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LE24LB642CS データシート(PDF) 4 Page - Sanyo Semicon Device |
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LE24LB642CS データシート(HTML) 4 Page - Sanyo Semicon Device |
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4 / 11 page ![]() LE24LB642CS Bus Timing tBUF tSU.STO tR SCL SDA/IN SDA/OUT tSU.STA tHD.DAT tHIGH tLOW tSU.DAT tDH tAA tF tHD.STA tSP tSP Write Timing tWC SCL SDA D0 Write Data Acknowledge Stop condition Start condition Pin Functions SCL (serial clock input) pin The SCL pin is a serial clock input pin that processes signals at the rising and falling edges of SCL clock signals. SDA (serial data input/output) pin The SDA pin is used to transfer serial data to the input/output, and it consists of a signal input pin and n-channel transistor open drain output pin. Like the SCL pin, the SDA pin must be pulled up by a resistor to the VDD level and wired-ORed with an open drain (or open collector) output device for use. WP (write protect) pin When the WP pin is high, write protection is enabled, and writing into the 64k bit memory areas is prohibited. When the pin is low, writing is possible to all memory areas. Read operations can be performed regardless of the WP pin status. No.A1464-4/11 |
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