データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

TC58FVT641 データシート(PDF) 20 Page - Toshiba Semiconductor

部品番号 TC58FVT641
部品情報  64-MBIT (8M 횞 8 BITS / 4M 횞 16 BITS) CMOS FLASH MEMORY
PDF  53 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  TOSHIBA [Toshiba Semiconductor]
ホームページ  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC58FVT641 データシート(HTML) 20 Page - Toshiba Semiconductor

Back Button TC58FVT641 Datasheet HTML 16Page - Toshiba Semiconductor TC58FVT641 Datasheet HTML 17Page - Toshiba Semiconductor TC58FVT641 Datasheet HTML 18Page - Toshiba Semiconductor TC58FVT641 Datasheet HTML 19Page - Toshiba Semiconductor TC58FVT641 Datasheet HTML 20Page - Toshiba Semiconductor TC58FVT641 Datasheet HTML 21Page - Toshiba Semiconductor TC58FVT641 Datasheet HTML 22Page - Toshiba Semiconductor TC58FVT641 Datasheet HTML 23Page - Toshiba Semiconductor TC58FVT641 Datasheet HTML 24Page - Toshiba Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 20 / 53 page
background image
TC58FVT641/B641FT/XB-70,-10
2001-09-06
20/53
DC CHARACTERISTICS
SYMBOL
PARAMETER
CONDITION
MIN
MAX
UNIT
ILI
Input Leakage Current
0 V
≤ VIN ≤ VDD
±1
ILO
Output Leakage Current
0 V
≤ VOUT ≤ VDD
±1
µA
IOH = −0.1 mA
VDD − 0.4
VOH
Output High Voltage
IOH = −2.5 mA
0.85
× VDD
VOL
Output Low Voltage
IOL = 4.0 mA
0.4
V
IDDO1
VDD Average Read Current
VIN = VIH/VIL, IOUT = 0 mA
tCYCLE = tRC = 100 ns
30
IDDO2
VDD Average Program Current
VIN = VIH/VIL, IOUT = 0 mA
15
IDDO3
VDD Average Erase Current
VIN = VIH/VIL, IOUT = 0 mA
15
IDDO4
VDD Average
Read-While-Program Current
VIN = VIH/VIL, IOUT = 0 mA
tCYCLE = tRC = 100 ns
45
IDDO5
VDD Average Read-while-Erase
Current
VIN = VIH/VIL, IOUT = 0 mA
tCYCLE = tRC = 100 ns
45
IDDO6
VDD Average Program-while-
Erase-Suspend Current
VIN = VIH/VIL, IOUT = 0 mA
15
mA
IDDS1
VDD Standby Current
CE
= RESET = VDD
or RESET
= VSS
10
IDDS2
VDD Standby Current
(Automatic Sleep Mode
(1)
)
VIH = VDD
VIL = VSS
10
IID
High-Voltage Input Current for
A9, OE and RESET
11.4 V
≤ VID ≤ 12.6 V
35
µA
IACC
High-Voltage Input Current for
/ACC
WP
8.5 V
≤ VACC ≤ 9.5 V
20
mA
VLKO
Low-VDD Lock-out Voltage
2.3
2.5
V
(1) The device enters Automatic Sleep Mode in which the address remains fixed for during 150 ns.
AC TEST CONDITIONS
PARAMETER
CONDITION
Input Pulse Level
VDD, 0.0 V
Input Pulse Rise and Fall Time (10%~90%)
5 ns
Timing Measurement Reference Level (input)
1.5 V, 1.5 V
Timing Measurement Reference Level (output)
1.5 V, 1.5 V
Output Load
CL (100 pF) + 1 TTL Gate/CL (30 pF) + 1 TTL Gate



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com