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LSM320HAY30 データシート(PDF) 31 Page - STMicroelectronics |
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LSM320HAY30 データシート(HTML) 31 Page - STMicroelectronics |
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31 / 42 page ![]() LSM320HAY30 Register description Doc ID 16917 Rev 1 31/42 8.4 LA_CTRL_REG3 (22h) 8.5 LA_CTRL_REG4 (23h) Table 24. LA_CTRL_REG3 register IHL PP_OD LIR2 I2_CFG1 I2_CFG0 LIR1 I1_CFG1 I1_CFG0 Table 25. LA_CTRL_REG3 description IHL Interrupt active high, low. Default value: 0 (0: active high; 1: active low) PP_OD Push-pull/open drain selection on interrupt pad. Default value 0. (0: push-pull; 1: open drain) LIR2 Latch interrupt request on INT2_SRC register, with INT2_SRC register cleared by reading INT2_SRC itself. Default value: 0. (0: interrupt request not latched; 1: interrupt request latched) I2_CFG1, I2_CFG0 Data signal on INT 2 pad control bits. Default value: 00. (see table below) LIR1 Latch interrupt request on INT1_SRC register, with INT1_SRC register cleared by reading INT1_SRC register. Default value: 0. (0: interrupt request not latched; 1: interrupt request latched) I1_CFG1, I1_CFG0 Data signal on INT 1 pad control bits. Default value: 00. (see table below) Table 26. Data signal on INT 1 and INT 2 pad I1(2)_CFG1 I1(2)_CFG0 INT 1(2) Pad 0 0 Interrupt 1 (2) source 0 1 Interrupt 1 source OR Interrupt 2 source 1 0 Data ready 1 1 Boot running Table 27. LA_CTRL_REG4 register BDU BLE FS1 FS0 STsign 0 ST SIM |
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