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PCF2129AT データシート(PDF) 29 Page - NXP Semiconductors |
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PCF2129AT データシート(HTML) 29 Page - NXP Semiconductors |
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29 / 68 page ![]() PCF2129A_1 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 01 — 13 January 2010 29 of 68 NXP Semiconductors PCF2129A Integrated RTC, TCXO and quartz crystal 8.10 Timer functions The PCF2129A has a watchdog timer function. The timer can be selected by using the control bit WD_CD in the register Watchdg_tim_ctl. The watchdog timer has four selectable source clocks. It can be used to detect a microprocessor with interrupt and reset capability which is out of control (see Section 8.10.3) To control the timer function and timer output, the registers Control_2, Watchdg_tim_ctl, and Watchdg_tim_val are used. 8.10.1 Register Watchdg_tim_ctl [1] Default value. [2] When writing to the register this bit has always to be set logic 0. 8.10.2 Register Watchdg_tim_val Table 30. Watchdg_tim_ctl - watchdog timer control register (address 10h) bit description Bit Symbol Value Description 7 WD_CD 0[1] watchdog timer disabled 1 watchdog timer enabled; the interrupt pin INT is activated when timed out 6T 0[2] unused 5TI_TP 0[1] the interrupt pin INT is configured to generate a permanent active signal when MSF (register Control_2) is set 1 the interrupt pin INT is configured to generate a pulsed signal when MSF flag is set (see Figure 19) 4to2 - unused 1 to 0 TF[1:0] timer source clock for watchdog timer 00 4.096 kHz 01 64 Hz 10 1 Hz 11[1] 1 ⁄ 60 Hz Table 31. Watchdg_tim_val - watchdog timer value register (address 11h) bit description Bit Symbol Value Description 7 to 0 WATCHDG_TIM_VAL[7:0] 00 to FF countdown period in seconds: where n is the countdown value CountdownPeriod n SourceClockFrequency --------------------------------------------------------------- = |
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