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HT95R65 データシート(PDF) 3 Page - Holtek Semiconductor Inc

部品番号 HT95R65
部品情報  CID Phone 8-Bit MCU with CPT
PDF  82 Pages
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メーカー  HOLTEK [Holtek Semiconductor Inc]
ホームページ  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT95R65 データシート(HTML) 3 Page - Holtek Semiconductor Inc

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Pin Description
Pad Name
I/O
Options
Description
PA0~PA7
I/O
Pull-high
Wake-up
Bidirectional 8-bit input/output port. Each individual pin on this port can be
configured as a wake-up input by a configuration option. Software instructions
determine if the pin is a CMOS output or Schmitt Trigger input. Configuration
options determine which pins on the port have pull-high resistors.
PC0, PC5, PC7
I/O
Pull-High
Bidirectional input/output port. Software instructions determine if the pin is a
CMOS output or Schmitt Trigger input. Configuration options determine which
pins on the port have pull-high resistors. When the multi-function interrupt is
enabled an interrupt will be generated whenever PC0 or PC5 has a falling
edge, or PC7 has a rising edge. When in the idle mode such an interrupt will
wake up the device.
PC1/AUD
PC4/TMR0
PC6/TMR1
I/O
DAC Output
Pull-High
Bidirectional input/output port. Software instructions determine if the pin is a
CMOS output or Schmitt Trigger input. Configuration options determine which
pins on the port have pull-high resistors. PC1 is also D/A pin for audio output
for driving an external transistor or power amplifier. Pin PC4 and PC6 are
pin-shared with the external timer input pin TMR0 and TMR1 respectively.
PC2, PC3
O
¾
NMOS output structures
PD0/SCOM0
PD1/SCOM1
PD2/SCOM2
PD3/SCOM3
PD4~PD7
I/O
Pull-High
Bidirectional 8-bit input/output port. Software instructions determine if the pin
is a CMOS output or Schmitt Trigger input. Configuration options determine
which nibble on the port have pull-high resistors. PD0~PD3 also support LCD
software COM port function.
PE0/SDO
PE1/SDI/SDA
PE2/SCK/SCL
PE3/SCS
PE4/PCLK/VDDIO
PE5/PINT
PE6~PE7
I/O
Pull-High
Schmitt Trigger input and CMOS output. I
2C and SPI functional pins: SDO,
SDI/SDA, SCK/SCL, SCS, PCLK, PINT are pin-shared with PE0~PE5 re-
spectively. For I
2C, PE2 and PE1 used as SCL and SDA of I2C respectively.
For use as SPI, PE0~PE3 used as SDO, SDI, SCK, SCS of SPI respectively.
SDO is a serial interface data output. SCK is a serial interface clock input/out-
put (Initial is input). SCS is a chip select pin of the serial peripheral interface,
input for slave mode and output for master mode. SDI is a serial interface data
input. PCLK is a peripheral clock. PINT is external peripheral interrupt pin.
Once the SPI/I
2C bus function is used, the PE0~PE3 could not be used as
normal I/O pins. PE4/PCLK is pin shared with VDDIO which is selected by
configuration option. PE4 I/O function & PCLK output function will be disabled
when this pin used as VDDIO. VDDIO is used to provide the SPI/I
2C interface
I/Os a pull high voltage, set by external power supplier, other than the device
operating voltage. The purpose of this design is to cope with the voltage differ-
ence between Master device and Slave device, such as Voice Flash memory.
PF0~PF7
I/O
Pull-High
Bidirectional 8-bit input/output port. Software instructions determine if the pin
is a CMOS output or Schmitt Trigger input. Configuration options determine
which nibble on the port have pull-high resistors.
INT
I
¾
External interrupt Schmitt Trigger input. Edge trigger activated on high to low
transition. No pull-high resistor.
DTMF
O
¾
Dual Tone Multi Frequency Output
PFD
O
¾
CMOS output structure Programmable Frequency Divider pin
LBIN
I
¾
This pin detects battery low through external R1/R2 to determine threshold
voltage.
RT/GT
I/O
¾
Tone acquisition time and release time can be set through connection with ex-
ternal resistor and capacitor CMOS IN/OUT for DTMF receiver.
EST
O
¾
Early steering output CMOS out for DTMF receiver.
VP
I
¾
Operational amplifier non-inverting input for DTMF receiver.
VN
I
¾
Operational amplifier inverting input for DTMF receiver.
GS
O
¾
Operational amplifier output terminal for DTMF receiver.
HT95R64/HT95R65
Rev. 1.00
3
March 3, 2010



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