| データシートサーチシステム |
|
HT95R65 データシート(PDF) 4 Page - Holtek Semiconductor Inc |
|
|
|||||||||||||||||||||||||||||
HT95R65 データシート(HTML) 4 Page - Holtek Semiconductor Inc |
|
4 / 82 page ![]() Pad Name I/O Options Description VREF O ¾ Reference voltage output, normally VDD/2 for DTMF receiver. TIP I ¾ Input pin connected to the tip side of the twisted pair wires for FSK decoder. It is internally biased to 1/2 VDD when the device is in power-up mode. This pin must be DC isolated from the line. RING I ¾ Input pin connected to the ring side of the twisted pair wires for FSK decoder. It is internally biased to 1/2 VDD when the device is in power-up mode. This pin must be DC isolated from the line. RDET, LBIN I ¾ This pin detects ring energy on the line through an attenuating network for FSK decoder. RTIMEB Schmitt trigger input and NMOS output pin which functions with RDET1 pin to make an RC network that performs ring detection function for FSK decoder. CPTENV O While an input signal for CPT detector is within specification, this pin will out- put the envelope relative to the input signal with a typical 40ms timing delay. CPTVREF I 1/2 VDD reference voltage output pin for CPT detector. When CPTENB = VDD, the device will be turned off and CPTVREF disabled. CPTSIN I AC coupled analog signal input pin for CPT detector. CPTENB I CPT detector enable control pin. CPTENB = VSS: normal operation mode. CPTENB = VDD: disabled mode. CPTX1 CPTX2 I O CPTX1 and CPTX2 are connected to an external 32768Hz crystal or resona- tor for the CPT detector clock source. The oscillator is turned off in the CPT detector disabled mode. X1 X2 I O ¾ X1 and X2 are connected to an external 32768Hz crystal or resonator for the system clock. XC ¾¾ External low pass filter pin used for the frequency up conversion circuit. RES I ¾ Schmitt trigger reset input. Active low. VDD ¾¾ Positive power supply VSS ¾¾ Negative power supply, ground. VDD2 ¾¾ DTMF receiver positive power supply VSS2 ¾¾ DTMF receiver negative power supply VDD3 ¾¾ Positive power supply for FSK Decoder VSS3 ¾¾ Negative power supply for FSK Decoder VDD4 ¾¾ Positive power supply for CPT detector VSS4 ¾¾ Negative power supply for CPT detector Note: Each pin on PA can be programmed through a configuration option to have a wake-up function. Absolute Maximum Ratings Supply Voltage ...........................VSS -0.3V to VSS+6.0V Storage Temperature ............................ -50°Cto125°C Input Voltage..............................VSS -0.3V to VDD+0.3V Operating Temperature........................... -40°Cto85°C IOL Total ..............................................................150mA IOH Total............................................................ -100mA Total Power Dissipation .....................................500mW Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. HT95R64/HT95R65 Rev. 1.00 4 March 3, 2010 |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |