WM8733

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WOLFSON MICROELECTRONICS LTD

PP Rev 1.3 July 2000

6

DAC CIRCUITS

The WM8733 DACs are designed to allow playback of 18-bit PCM audio or similar data with high

resolution and low noise and distortion. Sample rates up to 96ks/s may be used, with much lower

sample rates acceptable provided that the ratio of sample rate (LRCIN) to system clock is maintained

at the required 256fs, or 384fs or 512fs times.

The DACs on WM8733 are implemented using sigma-delta oversampled conversion techniques.

These require that the PCM samples are digitally filtered and interpolated to generate a set of

samples at a much higher rate than the input rate. This sample stream is then digitally modulated to

generate a digital pulse stream that is then converted to analogue signals in a switched capacitor

DAC. The advantage of this technique is that the DAC is linearised using noise shaping techniques,

allowing the 16-bit resolution to be met using non-critical analogue components. A further advantage

is that the high sample rate at the DAC output means that smoothing filters on the output of the DAC

need only have fairly crude characteristics in order to remove the characteristic steps, or images, on

the output of the DAC. In order to ensure that generation of tones characteristic to sigma-delta

convertors is not a problem, dithering is used in the digital modulator, and a higher order modulator is

used. The switched capacitor technique used in the DAC reduces sensitivity to clock jitter compared

to switched current techniques used in other implementations.

De-emphasis of 44.1kHz signals may be applied if required.

DEEMPH

DESCRIPTION

0

De-emphasis is OFF

1

De-emphasis is ON

(44.1kHz only)

Table 2 De-emphasis Control

The voltage on the CAP pin is used as the reference for the DACs, therefore the amplitude of the

signals at the DAC outputs will scale with the amplitude of the voltage at the CAP. An external

reference could be used to drive in on the CAP pin if desired, but a value typically of about midrail

should be used for optimum performance.

The outputs of the 2 DACs are buffered out of the device by buffer amplifiers. These amplifiers will

source load current of several mA and sink current up to 1.5mA, so allowing significant loads to be

driven. The output source is active, the sink is Class A, i.e. fixed value, so greater loads might be

driven if an external ‘pull-down’ resistor is connected at the output.

Typically an external low pass filter circuit will be used to remove residual sampling noise of the 64x

oversampling used and if desired adjust the signal amplitude and device strength.