PIC16F707T-ESLASHML datasheet(101/284 Pages) MICROCHIP

101 / 284 page

 2010 Microchip Technology Inc.

Preliminary

DS41418A-page 101

PIC16F707/PIC16LF707

13.1

Timer1/3 Operation

The Timer1 and Timer3 modules are 16-bit increment-

ing counters which are accessed through the

TMRxH:TMRxL register pair. Writes to TMRxH or

TMRxL directly update the counter.

When used with an internal clock source, the module is

a timer and increments on every instruction cycle.

When used with an external clock source, the module

can be used as either a timer or counter and incre-

ments on every selected edge of the external source.

Timer1/3 is enabled by configuring the TMRxON and

TMRxGE bits in the TxCON and TxGCON registers,

respectively. Table 13-2 displays the Timer1/3 enable

selections.

13.2

Clock Source Selection

The TMRxCS<1:0> bits of the TxCON register and the

T1OSCEN bit of the T1CON register are used to select

the clock source for Timer1/3. Table 13-3 displays the

clock source selections.

13.2.1

INTERNAL CLOCK SOURCE

When the internal clock source is selected, the

TMRxH:TMRxL register pair will increment on multiples

of FOSC as determined by the Timer1/3 prescaler.

13.2.2

EXTERNAL CLOCK SOURCE

When the external clock source is selected, the

Timer1/3 modules may work as a timer or a counter.

When enabled to count, Timer1/3 is incremented on the

rising edge of the external clock input TxCKI or a

capacitive sensing oscillator signal. Either of these

external clock sources can be synchronized to the

microcontroller system clock or they can be run

asynchronously. If set for the capacitive sensing

oscillator signal, Timer1 will use the CPS A signal and

Timer3 will use the CPS B signal (see Table 13-1).

When used as a timer with a clock oscillator, an

external 32.768 kHz crystal can be used in conjunction

with the dedicated internal oscillator circuit. Only one

dedicated internal oscillator circuit is available. See

Section 13.4

“Timer1/3

Oscillator”

for

information.

TABLE 13-2:

TIMER1/3 ENABLE

SELECTIONS

TMRxON

TMRxGE

Timer1/3

Operation

Off

Always On

Count Enabled

Note:

In Counter mode, a falling edge must be

registered by the counter prior to the first

incrementing rising edge after any one or

more of the following conditions:

• Timer1/3 enabled after POR reset

• Write to TMRxH or TMRxL

• Timer1/3 is disabled

• Timer1/3 is disabled (TMRxON = 0)

when TxCKI is high, then Timer1/3 is

enabled (TMRxON=1) when TxCKI is

low.

TABLE 13-3:

CLOCK SOURCE SELECTIONS

TMRxCS1

TMRxCS0

T1OSCEN

Timer1 Clock Source

Timer3 Clock Source

System Clock (FOSC)

Instruction Clock (FOSC/4)

Capacitive Sensing A Oscillator

Capacitive Sensing B Oscillator

External Clocking on T1CKI Pin

External Clocking on T3CKI Pin

Oscillator Circuit on T1OSI/

T1OSO Pins

Oscillator Circuit on T1OSI/

T1OSO Pins

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