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PCF8531 データシート(PDF) 39 Page - NXP Semiconductors |
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PCF8531 データシート(HTML) 39 Page - NXP Semiconductors |
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39 / 51 page ![]() PCF8531 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 10 August 2010 39 of 51 NXP Semiconductors PCF8531 34 x 128 pixel matrix driver 15. Application information 15.1 Typical system configuration The host microprocessor/microcontroller and the PCF8531 are both connected to the I2C-bus. The SDA and SCL lines must be connected to the positive power supply via pull-up resistors. The internal oscillator requires no external components. The appropriate intermediate biasing voltage for the multiplexed LCD waveforms are generated on-chip. The only other connections required to complete the system are to the power supplies (VDD, VSS and VLCD) and suitable capacitors for decoupling VLCD and VDD. 15.2 Power supply connections for internal VLCD generation Fig 29. Typical system configuration mgs483 HOST MICROPROCESSOR/ MICROCONTROLLER LCD PANEL VSS1, VSS2 VSS VDD(I2C) VLCD VDD1 to VDD3 VSS1, VSS2 SDA SCL PCF8531 Rpu Rpu RES 128 column drivers 34 row drivers Fig 30. Recommended VDD connections for internal VLCD generation VDD1 VDD2 VDD3 VSS1 VSS2 GND 1.8 V (1.9 V) to 5.5 V 2.5 V to 4.5 V 013aaa354 1 μF 1 μF VDD1 VDD2 VDD3 VSS1 VSS2 GND 2.5 V to 4.5 V 013aaa355 1 μF |
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