データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

STE12PS データシート(PDF) 13 Page - STMicroelectronics

部品番号 STE12PS
部品情報  12 channel integrated PSE line manager
PDF  44 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STE12PS データシート(HTML) 13 Page - STMicroelectronics

Back Button STE12PS Datasheet HTML 9Page - STMicroelectronics STE12PS Datasheet HTML 10Page - STMicroelectronics STE12PS Datasheet HTML 11Page - STMicroelectronics STE12PS Datasheet HTML 12Page - STMicroelectronics STE12PS Datasheet HTML 13Page - STMicroelectronics STE12PS Datasheet HTML 14Page - STMicroelectronics STE12PS Datasheet HTML 15Page - STMicroelectronics STE12PS Datasheet HTML 16Page - STMicroelectronics STE12PS Datasheet HTML 17Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 44 page
background image
Obsolete
Product(s)
- Obsolete
Product(s)
STE12PS
Functional description
13/44
CLASSIFICATION: The following operations are related to the classification procedure
for the corresponding channel
If classification is not enabled, the default Class 0 is assigned.
High Voltage detection command (17V) is issued via registers; detection timer is
started to execute the command for 15ms duration.
Wait for 5ms to acquire a stable measurement
Sampled sensing current values are acquired via A/D converter.
Average the previously acquired samples and report the resulting value in a
dedicated register. The power class is identified and the result is reported in the
Channel Status registers.
Channel is ready to be powered: if the smart-power algorithm is enabled (via the
MISCELLANEOUS registers) the channel is powered only if the required power is
within the remaining power budget; the channel can be powered regardless of the
power-check availability via registers.
If the power availability check has a positive result (or it hasn’t been performed), the channel
is powered. Otherwise, it is rejected, and the alarm flag raised in the Channel Events
register. The channel number is registered into a scheduler FIFO so that power will again be
available when the channel is ready to be switched-on.
Figure 4.
Detection and classification equivalent architecture
Detection/classification
+48V
+
-
+
+
-
12-bit A/D
converter
Digital
controller
+
-
D1
x12
D2 x12
STE12PS
VL
SPx
Px
+4V
+8V
+17V
-
IDET_HVLV
180pF
Detection/classification
+
-
+
+
-
12-bit A/D
converter
Digital
controller
+
-
D1
x12
D2 x12
VL
SPx
Px
+4V
8V
+17V
-
IDET_HVLV
180pF



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com