STE12PS datasheet(17/44 Pages) STMICROELECTRONICS

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STE12PS

Functional description

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Monitor overcurrent FSM

This particular FSM manages all operations related to procedures that are able to monitor

an overcurrent event.

All operations described below are related to channels currently powered.

●

STARTUP:

–

START: the channel to be monitored is selected.

●

VOLTAGE BATTERY:

–

SAMPLE Vbat: every 12 channels cycle the Vbat measurement is executed.

●

OVERCURRENT CHECK: the following operations are related to an overcurrent check

–Imeas CHECK: if Imeas>Ilim the I_LIM_FLAG is raised and the next powered

channel is prepared for the next monitor procedure.

–

START MONITOR: the Tlim counter is started if I_LIM_FLAG is found asserted.

–

COUNTER RESET: if I_LIM_FLAG is found de-asserted Tlim counter is reset

taking into account that glitches of duration less than 10ms are filtered.

●

POWER REMOVAL: the following operations are related to a power removal operation:

–

COUNTER CHECK: all the Tlim timers are checked and those expired are

identified.

–

POWER REMOVAL: all the channels whose timer is expired are switched OFF.

–

ALARM SET: for all the channels whose timers are expired a corresponding alarm

flag is raised in the FAULT_EVENT_CHn register and the related Ted timer is

started.

3.3.3

Thermal monitoring

The procedures performed by the digital controller are impacted by the thermal monitoring

data indicating the measured temperature.

Its behavior is based on a three-level control system

When the chip's internal temperature reaches 110°C, only the channels already

powered will be serviced. Possible new ones, will be rejected, redetected and

eventually processed when the internal temperature cools down to 100°C. This

behavior can be disabled setting the proper bit register.

A second temperature threshold is set at 130°C. When this value is reached, the

channels that are in current limiting or inrush condition are immediately switched OFF,

and their reactivation, subject to positive redetection, will only be possible when the

chip's internal temperature has cooled down to 100°C. This behavior can be disabled

by setting the proper bit register.

The third temperature threshold is set at 150°C. When this temperature is reached, all

activated channels will be immediately switched OFF, and their reactivation, subject to

positive redetection, will only be possible when the chip's internal temperature has

decreased to 100°C. This behavior cannot be disabled.

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