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STM8L101F1P3ATR データシート(PDF) 13 Page - STMicroelectronics |
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STM8L101F1P3ATR データシート(HTML) 13 Page - STMicroelectronics |
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13 / 81 page  STM8L101xx Product overview Doc ID 15275 Rev 11 13/81 3.15 USART The USART interface (USART) allows full duplex, asynchronous communications with external devices requiring an industry standard NRZ asynchronous serial data format. It offers a very wide range of baud rates. 3.16 SPI The serial peripheral interface (SPI) provides half/ full duplex synchronous serial communication with external devices. It can be configured as the master and in this case it provides the communication clock (SCK) to the external slave device. The interface can also operate in multi-master configuration. 3.17 I²C The inter-integrated circuit (I2C) bus interface is designed to serve as an interface between the microcontroller and the serial I2C bus. It provides multi-master capability, and controls all I²C bus-specific sequencing, protocol, arbitration and timing. It manages standard and fast speed modes. |
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