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MPC5673K データシート(PDF) 117 Page - Freescale Semiconductor, Inc |
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MPC5673K データシート(HTML) 117 Page - Freescale Semiconductor, Inc |
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117 / 140 page  Electrical characteristics MPC5675K Microcontroller Data Sheet, Rev. 4 Preliminary—Subject to Change Without Notice Freescale Semiconductor 117 9tSUI CC Data setup time for inputs Master (MTFE = 0) 20 — ns Slave 2— Master (MTFE = 1, CPHA = 0) 5— Master (MTFE = 1, CPHA = 1) 20 — 10 tHI CC Data hold time for inputs Master (MTFE = 0) –5 — ns Slave 4— Master (MTFE = 1, CPHA = 0) 11 — Master (MTFE = 1, CPHA = 1) –5 — 11 tSUO CC Data valid (after SCK edge) Master (MTFE = 0) —4 ns Slave —23 Master (MTFE = 1, CPHA = 0) —11 Master (MTFE = 1, CPHA = 1) —5 12 tHO CC Data hold time for outputs Master (MTFE = 0) –2 — ns Slave 6— Master (MTFE = 1, CPHA = 0) 6— Master (MTFE = 1, CPHA = 1) –2 — 13 tDT CC Delay after Transfer (minimum CS negation time) Continuous mode Non-continuos mode2 62 134 — — ns NOTES: 1 Slave Receive Only Mode can operate at a maximum frequency of 60 MHz. Note that in this mode, the DSPI can receive data on SIN, but no valid data is transmitted on SOUT. 2 In non-continuous mode, this value is always t SCK × DSPI_CTARn[DT] × DSPI_CTARn[PDT]. The minimum permissible value of DT is 2 and the minimum permissible value of PDT is 1. See the DSPI chapter of the MPC5675K Reference Manual (MPC5675KRM) for more information. Table 67. DSPI timing (continued) No. Symbol Parameter Conditions Min Max Unit |
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