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TMS570LS3137 データシート(PDF) 105 Page - Texas Instruments |
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TMS570LS3137 データシート(HTML) 105 Page - Texas Instruments |
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105 / 159 page ![]() TRST TMS TCK TDI TDO RTCK BoundaryScan BSR/BSDL BoundaryScanI/F SecondaryTap0 DAP Debug APB Debug ROM1 APBslave Cortex R4F APBMux AHB-AP POM ETM TPIU toSCR1via A2A from PCR1/Bridge SecondaryTap1 DMM RTP TAP 0 TAP 1 SecondaryTap2 AJSM TMS570LS3137 www.ti.com SPNS162. – SEPTEMBER 2011 4.21 Debug Subsystem 4.21.1 Block Diagram The device contains an ICEPICK module to allow JTAG access to the scan chains. Figure 4-19. ZWT Debug Subsystem Block Diagram 4.21.2 Debug Components Memory Map Table 4-37. Debug Components Memory Map FRAME ADDRESS RANGE RESPNSE FOR ACCESS TO FRAME CHIP FRAME ACTUA MODULE NAME UNIMPLEMENTED LOCATIONS IN SELECT SIZE L SIZE START END FRAME CoreSight Debug Reads return zeros, writes have no CSCS0 0xFFA0_0000 0xFFA0_0FFF 4KB 4KB ROM effect Cortex-R4F Reads return zeros, writes have no CSCS1 0xFFA0_1000 0xFFA0_1FFF 4KB 4KB Debug effect Reads return zeros, writes have no ETM-R4 CSCS2 0xFFA0_2000 0xFFA0_2FFF 4KB 4KB effect Reads return zeros, writes have no CoreSight TPIU CSCS3 0xFFA0_3000 0xFFA0_3FFF 4KB 4KB effect Copyright © 2011, Texas Instruments Incorporated System Information and Electrical Specifications 105 Submit Documentation Feedback focus.ti.com: TMS570LS3137 |
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