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R5F10RF8AFP データシート(PDF) 7 Page - Renesas Technology Corp

部品番号 R5F10RF8AFP
部品情報  Integrated LCD controller/driver, True Low Power Platform (as low as 75 關A/MHz, and 0.64 關A for RTC LVD), 1.6 V to 5.5 V operation, 8 to 32 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications
PDF  76 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F10RF8AFP データシート(HTML) 7 Page - Renesas Technology Corp

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RL78/L12
1. OUTLINE
Page 7 of 73
R01DS0157EJ0001 Rev.0.01
2012.02.20
Under development
Preliminary document
Specifications in this document are tentative and subject to change.
1.3.5 64-pin products
• 64-pin plastic WQFN (8 × 8)
1 2 3 4 5
6 7 8 9 10 11 12 13 14 15 16
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
P21/ANI1/AVREFM
P20/ANI0/AVREFP
P130
P147/SEG38
P146/SEG37
P145/ANI23/SEG36
P144/ANI22/SEG35
P143/ANI21/SEG34
P142/ANI20/SEG33
P14/ANI19/SEG32
P13/ANI18/SEG31
P12/SO00/TxD0/TOOLTxD/SEG30
P11/SI00/RxD0/TOOLRxD/SEG29
P10/SCK00/SEG28
P140/TO00/PCLBUZ0/SEG27/(INTP6)
P141/TI00/PCLBUZ1/SEG26/(INTP7)
P74/SEG12
P73/KR3/SEG13
P72/KR2/SEG14
P71/KR1/SEG15
P70/KR0/SEG16
P32/TI03/TO03/INTP4/SEG17
P31/INTP3/RTC1HZ/SEG18
P30/TI01/TO01/SEG19
P125/VL3
VL4
VL2
VL1
P126/CAPL
P127/CAPH
P61/SDAA0/SEG20
P60/SCLA0/SEG21
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
exposed die pad
Cautions 1. Make EVSS pin the same potential as VSS pin.
2. Make VDD pin the potential that is higher than EVDD pin.
3. Connect the REGC pin to Vss via a capacitor (0.47 to 1
μF).
Remarks 1. For pin identification, see 1.4
Pin Identification.
2. When using the microcontroller for an application where the noise generated inside the
microcontroller must be reduced, it is recommended to supply separate powers to the VDD and
EVDD pins and connect the VSS and EVSS pins to separate ground lines.
3. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O
redirection register (PIOR)



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