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R5F10RF8AFP データシート(PDF) 19 Page - Renesas Technology Corp

部品番号 R5F10RF8AFP
部品情報  Integrated LCD controller/driver, True Low Power Platform (as low as 75 關A/MHz, and 0.64 關A for RTC LVD), 1.6 V to 5.5 V operation, 8 to 32 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications
PDF  76 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F10RF8AFP データシート(HTML) 19 Page - Renesas Technology Corp

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RL78/L12
2. ELECTRICAL SPECIFICATIONS (TARGET)
Page 19 of 73
R01DS0157EJ0001 Rev.0.01
2012.02.20
Under development
Preliminary document
Specifications in this document are tentative and subject to change.
Caution
The pins mounted depend on the product.
Refer to 1.3.1
32-pin products to 1.3.5
64-pin
products.
Absolute Maximum Ratings (TA = 25
°C) (2/3)
Parameter
Symbols
Conditions
Ratings
Unit
VLI1
VL1 input voltage
Note 1
−0.3 to +VLI2
V
VLI2
VL2 input voltage
Note 1
VLI1 to VLI3
Note 2
V
VLI3
VL3 input voltage
Note 1
VLI2 to VLI4
V
VLI4
VL4 input voltage
Note 1
VLI3
Note 3 to +6.5
V
VLI5
CAPL, CAPH input voltage
Note 1
−0.3 to +6.5
V
VLO1
VL1 output voltage
−0.3 to +VLO2
V
VLO2
VL2 output voltage
VLO1 to VLO3
Note 4
V
VLO3
VL3 output voltage
VLO2 to VLO4
V
VLO4
VL4 output voltage
VLO3
Note 5 to +6.5
V
VLO5
CAPL, CAPH output voltage
−0.3 to +6.5
V
When other than
a memory-type
liquid crystal
waveform is
used
−0.3 to VDD +0.3Note 6
V
External
resistance
division method
When a
memory-type
liquid crystal
waveform is
used
−0.3 to VLI4 +0.3Note 6
V
Capacitor split method
−0.3 to VDD +0.3Note 6
V
LCD voltage
VLO6
COM0 to COM7,
SEG0 to SEG38,
COMEXP
output voltage
Internal voltage boosting method
−0.3 to VLI4 +0.3Note 6
V
Notes 1.
This value only indicates the absolute maximum ratings when applying voltage to the VL1, VL2,
VL3, and VL4 pins; it does not mean that applying voltage to these pins is recommended.
When using the internal voltage boosting method or capacitance split method, connect these
pins to VSS via a capacitor (0.47
μ F ± 30%) and connect a capacitor (0.47 μ F ± 30%)
between the CAPL and CAPH pins.
2.
This is VLI4 in 32-pin products or when the 1/3 bias method is used.
3.
This is VLI2 in 32-pin products or when the 1/3 bias method is used. It is VLI1 when the 1/2 bias
method is used. It is -0.3 in static mode.
4.
This is VLO4 in 32-pin products or when the 1/3 bias method is used.
5.
This is VLO2 in 32-pin products or when the 1/3 bias method is used. It is VLO1 when the 1/2 bias
method is used. It is -0.3 in static mode.
6.
Must be 6.5 V or lower.



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