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SC667201MMG3 データシート(PDF) 18 Page - Freescale Semiconductor, Inc

部品番号 SC667201MMG3
部品情報  Qorivva MPC5642A Microcontroller
PDF  120 Pages
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メーカー  FREESCALE [Freescale Semiconductor, Inc]
ホームページ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

SC667201MMG3 データシート(HTML) 18 Page - Freescale Semiconductor, Inc

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MPC5642A Microcontroller Data Sheet, Rev. 3.1
18
Freescale Semiconductor
Introduction
— Provides temperature of silicon as an analog value
— Read using an internal ADC analog channel
— May be read with either ADC
2 decimation filters
— Programmable decimation factor (1 to 16)
— Selectable IIR or FIR filter
— Up to 4th order IIR or 8th order FIR
— Programmable coefficients
— Saturated or non-saturated modes
— Programmable Rounding (Convergent; Two’s Complement; Truncated)
— Prefill mode to precondition the filter before the sample window opens
— Supports Multiple Cascading Decimation Filters to implement more complex filter designs
— Optional Absolute Integrators on the output of Decimation Filters
Full duplex synchronous serial interface (SSI) to an external device
— Free-running clock for use by an external device
— Supports a 26-bit message length
Priority based queues
— Supports 6 queues with fixed priority. When commands of distinct queues are bound for the same ADC, the higher
priority queue is always served first
— Queue_0 can bypass all prioritization, buffering and abort current conversions to start a Queue_0 conversion a
deterministic time after the queue trigger
— Supports software and hardware trigger modes to arm a particular queue
— Generates interrupt when command coherency is not achieved
External hardware triggers
— Supports rising edge, falling edge, high level and low level triggers
— Supports configurable digital filter
1.5.15
Deserial serial peripheral interface (DSPI)
The DSPI block provides a synchronous serial interface for communication between the MPC5642A MCU and external
devices. The DSPI supports pin count reduction through serialization and deserialization of eTPU and eMIOS channels and
memory-mapped registers. The channels and register content are transmitted using a SPI-like protocol. This SPI-like protocol
is completely configurable for baud rate, polarity and phase, frame length, chip select assertion, etc. Each bit in the frame may
be configured to serialize either eTPU channels, eMIOS channels or GPIO signals. The DSPI can be configured to serialize data
to an external device that implements the Microsecond Bus protocol. There are three identical DSPI blocks on the MPC5642A
MCU. The DSPI pins support 5 V logic levels or Low Voltage Differential Signalling (LVDS) to improve high speed operation.
DSPI module features include:
Selectable LVDS pads working at 40 MHz for SOUT and SCK pins for DSPI_B and DSPI_C
Support for downstream Micro Second Channel (MSC) with Timed Serial Bus (TSB) configuration on DSPI_B and
DSPI_C
3 sources of serialized data: eTPU_A, eMIOS output channels, and memory-mapped register in the DSPI
4 destinations for deserialized data: eTPU_A and eMIOS input channels, SIU external Interrupt input request,
memory-mapped register in the DSPI
32-bit DSI and TSB modes require 32 PCR registers, 32 GPO and GPI registers in the SIU to select either GPIO, eTPU
or eMIOS bits for serialization
The DSPI module can generate and check parity in a serial frame



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