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TFB2002B データシート(PDF) 7 Page - Texas Instruments

部品番号 TFB2002B
部品情報  FUTUREBUS I/O CONTROLLER
PDF  13 Pages
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メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
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TFB2002B データシート(HTML) 7 Page - Texas Instruments

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TFB2002BI
FUTUREBUS+ I/O CONTROLLER
SLLS182 – AUGUST 1994
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
JTAG test port
TERMINAL
I/O
FROM/TO
DESCRIPTION
NAME
NO.
I/O
FROM/TO
DESCRIPTION
TCK
167
I
Module
JTAG test clock
TDI
169
I
Module
JTAG test data in
TDO
168
O
Module
JTAG test data out
TMS
166
I
Module
JTAG test-mode select
reset port
TERMINAL
I/O
FROM/TO
DESCRIPTION
NAME
NO.
I/O
FROM/TO
DESCRIPTION
AQI
111
I
Arbitration handshake. AQI is used to determine if the arbitration bus has been idle for 1
µs.
If the arbitration bus is not implemented, this signal should be tied low.
ARI
112
I
Arbitration handshake. ARI is used to determine if the arbitration bus has been idle for 1
µs.
If the arbitration bus is not implemented, this signal should be tied high.
BINIT*
131
O
Module
Bus interface reset. BINIT* is an open-collector signal indicating that a bus interface reset
is required.
BUSI*
128
O
Bus idle. Bus has been idle for longer than 1
µs, and REO is asserted.
REI
115
I
Futurebus+ reset in
REO
113
O
Futurebus+ reset out
RST*
132
I
Module
Module power-up reset. RST* resets all logic; output signals go to their inactive states, state
outputs and bidirectional signals take on the high-impedance state.
SYSRESET*
130
O
Module
System reset required. SYSRESET* is an open-collector signal indicating that a system
reset is required.
RSTBYPASS*
124
I
Module
Reset bypass. Bypass auto alignment after power up.



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