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TNETX4090GGP データシート(PDF) 24 Page - Texas Instruments |
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TNETX4090GGP データシート(HTML) 24 Page - Texas Instruments |
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24 / 78 page  TNETX4090 ThunderSWITCH II™ 9-PORT 100-/1000-MBIT/S ETHERNET™ SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DIO interface description (continued) Table 3 and Table 4 list the least significant byte address for the port-specific statistics. Each statistic is four bytes long. To determine the address of a particular statistic, replace the xx in the head column with the characters from the tail address. Table 3 has two tail columns: one for even-numbered ports and the other for odd-numbered ports. See the TNETX4090 Programmer’s Reference Guide, literature number SPAU003, for a detailed description of the statistic registers. Example: Port 7 head = 0x83xx 64-octet frames tail = A8 (odd-numbered port) Port 7 octet frames statistic = 0x83A8 |
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