WM9093ECSSLASHR datasheet(33/84 Pages) WOLFSON

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Production Data

WM9093

PD, March 2012, Rev 4.2

ANALOGUE OUTPUTS

The speaker, headphone and earpiece outputs are highly configurable and may be used in many

different ways.

SPEAKER OUTPUT CONFIGURATIONS

The speaker output can be driven by the speaker mixer, SPKMIX, or by the low power differential

‘Voice Bypass’ path from IN3+ and IN3-. Fine volume control is available on the speaker mixer path

using the Speaker Output PGA. A boost function is available on the speaker mixer path and on the

Voice Bypass path. See the “Output Signal Path” section for more information on the speaker mixing

options.

The speaker output operates in a BTL configuration in Class AB or Class D amplifier modes; the

selected mode is determined by the SPKOUT_CLASSAB_MODE register bit, as defined in Table 15.

When the speaker mixer (SPKMIX) output is selected as the speaker output source, then Class D

mode should be selected in the output driver. When the ‘Voice Bypass’ signal is selected as the

speaker output source, then Class AB mode should be selected. Note that only one of these signal

paths should be selected at any time – see “Speaker Boost Mixer Control”.

A selectable 12dB attenuation is available at the speaker output driver in Class AB mode. This is

controlled using the SPK_ATTN_FB register. The 12dB attenuation can be used in conjunction with

the boost (gain) described below to provide a wider range of signal level control for the ‘Voice Bypass’

path. Note that this bit has no effect in Class D mode.

Eight levels of signal boost are provided in order to deliver maximum output power for many

commonly-used SVDD/HPVDD combinations. These boost options are available in both Class AB

and Class D modes. The boost level from 0dB to +12dB is selected using the SPKOUTL_BOOST

speaker output is enabled. Figure 4 illustrates the speaker output and the mixing and gain/boost

options available.

Ultra-low leakage and high PSRR allow the speaker supply SVDD to be directly connected to a

lithium battery. Note that an appropriate SVDD supply voltage must be provided to prevent waveform

clipping when speaker boost is used.

DC gain is applied automatically in both class AB and class D modes with a shift from VMID to

SVDD/2. This provides optimum signal swing for maximum output power. In class AB mode, an ultra-

high PSRR mode is available, in which the DC reference for the speaker driver is fixed at VMID. This

mode is selected by enabling the SPK_VREF_AB_CTRL bit (see Table 15). In this mode, the output

power is limited but the driver will still be capable of driving more than 500mW in 8

 while maintaining

excellent suppression of noise on SVDD (for example, TDMA noise in a GSM phone application).

Figure 4 Speaker Output Configuration and Boost Operation

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