RT8205CGQW datasheet(22/28 Pages) RICHTEK

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RT8205A/B/C

DS8205A/B/C-06 July 2012

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Soft-Start

A build-in soft-start is used to prevent surge current from

power supply input after ENTRIPx is enabled. The typical

soft-start duration is 2ms period. Furthermore, the

maximum allowed current limit is segmented in 5 steps:

20%, 40%, 60%, 80% and 100% during the 2ms period.

D4 when LGATE1 switched to high. So, VCP voltage is :

VCP = VOUT1 + 2 x VLGATE1

− 4 x VD

Where VLGATE1 is the peak voltage of LGATE1 driver and is

equal to the VREG5; VD is the forward diode dropped

across the Schottky.

LG1_CP in the RT8205B (Figure 3) can be used as clock

signal for charge pump circuit to generate approximately

14V DC voltage and the clock driver uses VOUT1 as its

power supply, SECFB in the RT8205C is used to monitor

the charge pump through resistive divider (Figure 4). In an

event when SECFB dropped below 2V, the detection circuit

forces the high-side MOSFET off and the low-side

MOSFET on for 300ns to allow CP to recharge and SECFB

rise above 2V. In the event of an overload on CP where

SECFB can not reach more than 2V, the monitor will be

cancelled. Special care should be taken to ensure enough

normal voltage ripple on each cycle as to prevent CP shut-

down.

The SECFB pin has ~17mV of hysteresis, so the ripple

should be enough to bring the SECFB voltage above the

threshold by ~3x the hysteresis, or (2V + 3 x 17mV) =

2.051V. Reducing the CP decoupling capacitor and placing

a small ceramic capacitor (10 pF to 47pF) (CF of Figure 4)

in parallel with the upper leg of the SECFB resistor

feedback network (RCP1 of Figure 4) will also increase the

robustness of the charge pump.

Figure 3. Connect to LG1_CP

LG1_CP

VOUT1

Figure 4. Connect to SECFB

SECFB

VOUT1

RCP1

RCP2

LGATE1

MOSFET Gate Driver (UGATEx, LGATEx)

The high-side driver is designed to drive high-current, low

RDS(ON)N-MOSFET(s). When configured as a floating driver,

5-V bias voltage is delivered from VREG5 supply. The

average drive current is also calculated by the gate charge

at VGS = 5 V times switching frequency. The instantaneous

drive current is supplied by the flying capacitor between

BOOTx and PHASEx pins. A dead time to prevent shoot

through is internally generated between high-side

MOSFET off to low-side MOSFET on, and low-side

MOSFET off to high-side MOSFET on.

The low-side driver is designed to drive high current low

RDS(ON) N-MOSFET(s). The internal pull-down transistor

that drives LGATEx low is robust, with a 0.6

Ω typical on-

resistance. A 5V bias voltage is delivered from VREG5

supply. The instantaneous drive current is supplied by an

input capacitor connected between VREG5 and GND.

For high-current applications, some combinations of high-

and low-side MOSFETs might be encountered that will

cause excessive gate-drain coupling, which can lead to

efficiency-killing, EMI-producing shoot-through currents.

This is often remedied by adding a resistor in series with

BOOTx, which increases the turn-on time of the high-side

MOSFET without degrading the turn-off time (Figure 5).

Figure 5. Reducing the UGATEx Rise Time

BOOTx

UGATEx

PHASEx

VIN

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