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AD73360L データシート(PDF) 21 Page - Analog Devices |
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AD73360L データシート(HTML) 21 Page - Analog Devices |
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21 / 32 page ![]() REV. 0 AD73360L –21– The sampling rate can be varied by programming the Decimation Rate Divider settings in CRB. For a DMCLK of 16.384 MHz sample rates of 64 kHz, 32 kHz, 16 kHz and 8 kHz are available. Figure 21 shows the final spectral response of a signal sampled at 8 kHz using the maximum oversampling rate. FREQUENCY – kHz 0 0 –20 24 –100 –140 –120 –40 –60 –80 SNR = 78dB (DC TO 4kHz) Figure 21. FFT (ADC 8 kHz Internally Decimated from 64 kHz) It is possible to generate lower sample rates through reducing the oversampling ratio by programming the DMCLK Rate Divider Settings in CRB (MCD2-MCD1). This will have the effect of spreading the quantization noise over a lesser band- width resulting in a degradation of dynamic performance. Figure 22 shows a FFT plot of a signal sampled at 8 kHz rate produced by reducing the DMCLK Rate. FREQUENCY – kHz 0 0 –20 24 –100 –140 –120 –40 –60 –80 SNR = 72.2dB (DC TO fS/2) Figure 22. FFT (ADC 8 kHz Sampling with Reduced DMCLK Rate) 1/2 74HC74 CLK DQ DSP CONTROL TO SE MCLK SE SIGNAL SYNCHRONIZED TO MCLK 1/2 74HC74 CLK DQ DSP CONTROL TO RESET MCLK RESET SIGNAL SYNCHRONIZED TO MCLK Figure 19. SE and RESET Sync Circuit for Cascaded Operation PERFORMANCE As the AD73360L is designed to provide high-performance, low-cost conversion, it is important to understand the means by which this high performance can be achieved in a typical appli- cation. This section will, by means of spectral graphs, outline the typical performance of the device and highlight some of the options available to users in achieving their desired sample rate, either directly in the device or by doing some post-processing in the DSP, while also showing the advantages and disadvantages of the different approaches. Encoder Section The encoder section samples at DMCLK/256, which gives a 64 kHz output rate for DMCLK equal to 16.384 MHz. The noise-shaping of the sigma-delta modulator also depends on the frequency at which it is clocked, which means that the best dynamic performance in a particular bandwidth is achieved by oversampling at the highest possible rate. If we assume that the signals of interest are in the bandwidth of dc–4 kHz, then sam- pling at 64 kHz gives a spectral response which ensures good SNR performance in that bandwidth, as shown in Figure 20. FREQUENCY – kHz 0 0 –20 816 24 32 –100 –140 –120 –40 –60 –80 SNR = 59.0dB (DC TO fS/2) SNR = 78.2dB (DC TO 4kHz) Figure 20. FFT (ADC 64 kHz Sampling) |
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