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TAS2521 データシート(PDF) 14 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS |
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TAS2521 データシート(HTML) 14 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS |
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14 / 35 page ![]() t td S ta MSB OUT BIT 6 . . . 1 LSB OUT t sck t Lead t Lag tsckh t sckl tr tf tv(DOUT) tdis MSB IN BIT 6 . . . 1 LSB IN thi tsu SS SCLK MISO MOSI TAS2521 SLAS687A – FEBRUARY 2013 – REVISED FEBRUARY 2013 www.ti.com 3.5.6 SPI Interface Timing Figure 3-6. SPI Interface Timing Diagram Timing Requirements At 25°C, DVDD = 1.8V Table 3-1. SPI Interface Timing PARAMETER TEST CONDITION IOVDD=1.8V IOVDD=3.3V UNITS MIN TYP MAX MIN TYP MAX tsck SCLK Period (1) 100 50 ns tsckh SCLK Pulse width High 50 25 ns tsckl SCLK Pulse width Low 50 25 ns tlead Enable Lead Time 30 20 ns tlag Enable Lag Time 30 20 ns td Sequential Transfer Delay 40 20 ns ta Slave DOUT access time 40 40 ns tdis Slave DOUT disable time 40 40 ns tsu DIN data setup time 15 15 ns thi DIN data hold time 15 10 ns tv;DOUT DOUT data valid time 25 18 ns tr SCLK Rise Time 4 4 ns tf SCLK Fall Time 4 4 ns (1) These parameters are based on characterization and are not tested in production. 14 ELECTRICAL SPECIFICATIONS Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TAS2521 |
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