3

®

DAC8043

DAC8043

PARAMETER

SYMBOL

CONDITIONS

LIMIT

UNITS

STATIC ACCURACY

Resolution

N

12

Bits min

Integral Nonlinearity

INL

±1

LSB max

Differential Nonlinearity

DNL

±1

LSB max

Gain Error

Using Internal Feedback Resistor

±2

LSB max

Power Supply Rejection Ratio

PSRR

∆V

±0.002

%/% max

±5

nA max

REFERENCE INPUT

Input Resistance

7/15

k

Ω min/max

DIGITAL INPUTS

Digital Input HIGH

2.4

V min

Digital Input LOW

0.8

V max

Input Leakage Current

±1

µA max

POWER SUPPLY

Supply Current

500

µA max

100

µA max

NOTE: Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not

guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.

WAFER TEST LIMITS

ELECTROSTATIC

DISCHARGE SENSITIVITY

Any integrated circuit can be damaged by ESD. Burr-Brown

recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

ESD damage can range from subtle performance degrada-

tion to complete device failure. Precision integrated circuits

may be more susceptible to damage because very small

parametric changes could cause the device not to meet

published specifications.

Digital Inputs: All digital inputs of the DAC8043 incorpo-

rate on-chip ESD protection circuitry. This protection is

designed and has been tested to withstand five 2500V

positive and negative discharges (100pF in series with 1500

Ω)

applied to each digital input.

Analog Pins: Each analog pin has been tested to Burr-

Brown’s analog ESD test consisting of five 1000V positive

and negative discharges (100pF in series with 1500

Ω) ap-

plied to each pin. V

ABSOLUTE MAXIMUM RATINGS

Operating Temperature Range

AD ........................................................................................ 0

°C to +70°C

U, UC ............................................................................... –40

°C to +85°C

Junction Temperature .................................................................... +150

°C

Storage Temperature .................................................... –65

°C to + 150°C

Lead Temperature (soldering, 10s) .............................................. +300

° C

θ

JA

..........................................................................................................................

+100

°C/W

θ

JC

........................................................................................... +42

°C/W

control inputs are ESD protected: however, permanent damage may occur on

unprotected units from high-energy electrostatic fields. Keep units in conduc-

tive foam at all times until ready to use. 3. Use proper anti-static handling

procedures. 4. Absolute Maximum Ratings apply to both packaged devices.

Stresses above those listed under Absolute Maximum Ratings may cause

permanent damage to the device.

Top View

8-Pin SOIC

PIN CONFIGURATION

8

7

5

6

CLK

SRI

LD

V

DD

1

2

4

3

R

FB

I

OUT

GND

V

REF

PACKAGE/ORDERING INFORMATION

PACKAGE

TEMPERATURE

DRAWING

PRODUCT

INL

RANGE

PACKAGE

DAC8043U

1LSB

–40

°C to +85°C

8-pin SOIC

182

DAC8043UC

1/2LSB

–40

°C to +85°C

8-pin SOIC

182

NOTE: (1) For detailed drawing and dimension table, please see end of data

sheet, or Appendix C of Burr-Brown IC Data Book.