PCF8563BSSLASH4 datasheet(16/50 Pages) NXP

16 / 50 page

PCF8563

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Product data sheet

Rev. 10 — 3 April 2012

16 of 50

NXP Semiconductors

PCF8563

Real-time clock/calendar

8.6.5 Alarm flag

By clearing the alarm enable bit (AE_x) of one or more of the alarm registers, the

corresponding alarm condition(s) are active. When an alarm occurs, AF is set to logic 1.

The asserted AF can be used to generate an interrupt (INT). The AF is cleared using the

interface.

The registers at addresses 09h through 0Ch contain alarm information. When one or

more of these registers is loaded with minute, hour, day or weekday, and its

corresponding AE_x is logic 0, then that information is compared with the current minute,

hour, day, and weekday. When all enabled comparisons first match, the alarm flag (AF in

The generation of interrupts from the alarm function is controlled via bit AIE. If bit AIE is

enabled, the INT pin follows the condition of bit AF. AF will remain set until cleared by the

interface. Once AF has been cleared, it will only be set again when the time increments to

match the alarm condition once more. Alarm registers which have their AE_x bit at logic 1

are ignored.

(1) Only when all enabled alarm settings are matching.

It’s only on increment to a matched case that the alarm flag is set, see Section 8.6.5.

Fig 10. Alarm function block diagram

013aaa088

WEEKDAY ALARM

AE_W

WEEKDAY TIME

DAY ALARM

AE_D

DAY TIME

HOUR ALARM

AE_H

HOUR TIME

MINUTE ALARM

AE_M

MINUTE TIME

check now signal

set alarm flag AF (1)

AE_M = 1

example

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