ADT7320UCPZ-R2 datasheet(11/24 Pages) AD

11 / 24 page

Data Sheet

ADT7320

Rev. 0 | Page 11 of 24

1 SPS MODE

In 1 SPS mode, the part performs one measurement per second.

A conversion takes 60 ms typically, and the part remains in the

idle state for the remaining 940 ms period. This mode is

enabled by setting Bits[6:5] of the configuration register

(Register Address 0x01) to 10.

SHUTDOWN MODE

The ADT7320 can be placed in shutdown mode by setting

Bits[6:5] of the configuration register (Register Address 0x01) to

11. The ADT7320 can be taken out of shutdown mode by

setting Bits[6:5] of the configuration register (Register Address

0x01) to 00. The ADT7320 typically takes 1 ms (with a 0.1 μF

decoupling capacitor) to come out of shut-down mode. The

conversion result from the last conversion prior to shutdown

can still be read from the ADT7320 even when it is in shutdown

mode. When the part is taken out of shutdown mode, the

internal clock restarts and a conversion is initiated.

FAULT QUEUE

Bit 0 and Bit 1 of the configuration register (Register Address 0x01)

are used to set up a fault queue. Up to four faults are provided to

prevent false tripping of the INT and CT pins when the ADT7320

is used in a noisy temperature environment. The number of

faults set in the queue must occur consecutively to set the INT

and CT outputs. For example, if the number of faults set in the

queue is four, then four consecutive temperature conversions

must occur, with each result exceeding a temperature limit set in

any of the limit registers, before the INT and CT pins are activated.

If two consecutive temperature conversions exceed a temperature

limit and the third conversion does not, the fault count is reset to

zero.

ADT7320UCPZ-R2 データシート(PDF) 11 Page - Analog Devices