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STM32L151VBT6DTR データシート(PDF) 83 Page - STMicroelectronics |
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STM32L151VBT6DTR データシート(HTML) 83 Page - STMicroelectronics |
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83 / 121 page  STM32L151x6/8/B, STM32L152x6/8/B Electrical characteristics Doc ID 17659 Rev 8 83/121 Figure 19. Recommended NRST pin protection 1. The reset network protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 45. Otherwise the reset will not be taken into account by the device. 6.3.14 TIM timer characteristics The parameters given in the following table are guaranteed by design. Refer to Section 6.3.11: I/O current injection characteristics for details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output). ai17854 STM32L15xxx RPU NRST(2) VDD Filter Internal reset 0.1 μF External reset circuit(1) Table 46. TIMx(1) characteristics 1. TIMx is used as a general term to refer to the TIM2, TIM3 and TIM4 timers. Symbol Parameter Conditions Min Max Unit tres(TIM) Timer resolution time 1 tTIMxCLK fTIMxCLK = 32 MHz 31.25 ns fEXT Timer external clock frequency on CH1 to CH4 0 fTIMxCLK/2 MHz fTIMxCLK = 32 MHz 0 16 MHz ResTIM Timer resolution 16 bit tCOUNTER 16-bit counter clock period when internal clock is selected (timer’s prescaler disabled) 1 65536 tTIMxCLK fTIMxCLK = 32 MHz 0.0312 2048 µs tMAX_COUNT Maximum possible count 65536 × 65536 tTIMxCLK fTIMxCLK = 32 MHz 134.2 s |
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