L4995

Application information

Doc ID 13103 Rev 13

17/35

3

Application information

Figure 26.

L4995 application schematic(1)

1.

The input capacitor Cs > 200nF is necessary for the smoothing of line disturbances. The output capacitor

C01 > 100nF is necessary for the stability of the regulation loop. In order to dampen output voltage

oscillations during high load current surges, it is recommended an additional electrolytic capacitor C02 >

10µF to be placed at the output pin.

Figure 27.

Stability region(1)

1.

The curve which describes the minimum ESR is derived from characterization data on the regulator with

connected ceramic capacitors which feature low ESR values (at 100 kHz). Any capacitor with further lower

ESR than the given plot value must be evaluated in each and every case.

0.001

0.01

0.1

1

10

100

0.5

5

10

1520

2530

3540

45

50

Co (uF)

ESR min

ESR max

Unstable region

Stability region

Undefined region