24AA256/24LC256/24FC256

DS21203Q-page 4

 2010 Microchip Technology Inc.

FIGURE 1-1:

BUS TIMING DATA

13

Output valid from clock

(Note 2)

—

—

—

—

3500

900

900

400

ns

1.7 V

2.5 V

1.7V

2.5 V

14

Bus free time: Time the bus

must be free before a new

transmission can start

4700

1300

1300

500

—

—

—

—

ns

1.7V

2.5V

1.7V

2.5V

15

 100 pF

10 + 0.1CB

250

250

ns

All except, 24FC256 (Note 1)

16

Input filter spike suppression

(SDA and SCL pins)

—

50

ns

All except, 24FC256 (Notes 1

and 3)

17

Write cycle time (byte or

page)

—5

ms

—

18

—

Endurance

1,000,000

—

cycles Page mode, 25°C, 5.5V (Note 4)

AC CHARACTERISTICS (Continued)

Electrical Characteristics:

Industrial (I):

Automotive (E):

Param.

No.

Sym.

Characteristic

Min.

Max.

Units

Conditions

Note 1:

2:

As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3:

4:

This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site

at www.microchip.com.

(unprotected)

(protected)

SCL

SDA

IN

SDA

OUT

WP

5

7

6

16

3

2

89

13

D3

4

10

11

12

14