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AD5258BRMZ100-R7 データシート(PDF) 1 Page - Analog Devices

部品番号 AD5258BRMZ100-R7
部品情報  Nonvolatile, I2C-Compatible 64-Position, Digital Potentiometer
PDF  24 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD5258BRMZ100-R7 データシート(HTML) 1 Page - Analog Devices

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Nonvolatile, I2C®-Compatible
64-Position, Digital Potentiometer
Data Sheet
AD5258
Rev. D
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2005–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
FEATURES
Nonvolatile memory maintains wiper settings
64-position digital potentiometer
Compact MSOP-10 (3 mm × 4.9 mm)
I2C-compatible interface
VLOGIC pin provides increased interface flexibility
End-to-end resistance 1 kΩ, 10 kΩ, 50 kΩ, 100 kΩ
Resistance tolerance stored in EEPROM (0.1% accuracy)
Power-on EEPROM refresh time <1 ms
Software write protect command
Address Decode Pin AD0 and Address Decode Pin AD1 allow
four packages per bus
100-year typical data retention at 55°C
Wide operating temperature
−40°C to +85°C
3 V to 5 V single supply
APPLICATIONS
LCD panel VCOM adjustment
LCD panel brightness and contrast control
Mechanical potentiometer replacement in new designs
Programmable power supplies
RF amplifier biasing
Automotive electronics adjustment
Gain control and offset adjustment
Fiber to the home systems
Electronics level settings
FUNCTIONAL BLOCK DIAGRAMS
RDAC
REGISTER
RDAC
DATA
CONTROL
COMMAND
DECODE LOGIC
ADDRESS
DECODE LOGIC
CONTROL LOGIC
AD5258
I2C
SERIAL
INTERFACE
POWER-
ON RESET
A
W
B
SCL
SDA
AD0
AD1
VDD
VLOGIC
GND
RDAC
EEPROM
6
6
Figure 1. Block Diagram
COMMAND
DECODE LOGIC
ADDRESS
DECODE LOGIC
CONTROL
LOGIC
SCL
SDA
AD0
AD1
GND
EEPROM
I2C
SERIAL
INTERFACE
RDAC
REGISTER
AND
LEVEL
SHIFTER
A
W
B
VLOGIC
VDD
Figure 2. Block Diagram Showing Level Shifters
GENERAL DESCRIPTION
The AD5258 provides a compact, nonvolatile 3 mm × 4.9 mm
packaged solution for 64-position adjustment applications. These
devices perform the same electronic adjustment function as
mechanical potentiometers1 or variable resistors, but with
enhanced resolution and solid-state reliability.
The wiper settings are controllable through an I2C-compatible
digital interface that is also used to read back the wiper register
and EEPROM content in addition, resistor tolerance is stored
within EEPROM, providing an end-to-end tolerance accuracy
of 0.1%. There is also a software write protection function that
ensures data cannot be written to the EEPROM register.
A separate VLOGIC pin delivers increased interface flexibility. For
users who need multiple parts on one bus, Address Bit AD0 and
Address Bit AD1 allow up to four devices on the same bus.
1
The terms digital potentiometer, VR (variable resistor), and RDAC are used
interchangeably.


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