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AX2000 データシート(PDF) 46 Page - Microsemi Corporation

部品番号 AX2000
部品情報  Axcelerator Family FPGAs
PDF  262 Pages
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メーカー  MICROSEMI [Microsemi Corporation]
ホームページ  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

AX2000 データシート(HTML) 46 Page - Microsemi Corporation

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Detailed Specifications
2- 32
R e v i sio n 1 8
LVTTL Output Drive Strength =3 (16 mA) / High Slew Rate
tDP
Input Buffer
1.68
1.92
2.26
ns
tPY
Output Buffer
3.12
3.56
4.18
ns
tENZL
Enable to Pad Delay through the Output Buffer—Z to
Low
3.54
4.04
4.75
ns
tENZH
Enable to Pad Delay through the Output Buffer—Z to
High
2.78
3.17
3.72
ns
tENLZ
Enable to Pad Delay through the Output Buffer—Low
to Z
1.91
1.93
1.93
ns
tENHZ
Enable to Pad Delay through the Output Buffer—High
to Z
2.58
2.59
2.60
ns
tIOCLKQ
Sequential Clock-to-Q for the I/O Input Register
0.67
0.77
0.90
ns
tIOCLKY
Clock-to-output Y for the I/O Output Register and the
I/O Enable Register
0.67
0.77
0.90
ns
tSUD
Data Input Set-Up
0.23
0.27
0.31
ns
tSUE
Enable Input Set-Up
0.26
0.30
0.35
ns
tHD
Data Input Hold
0.00
0.00
0.00
ns
tHE
Enable Input Hold
0.00
0.00
0.00
ns
tCPWHL
Clock Pulse Width High to Low
0.39
0.39
0.39
ns
tCPWLH
Clock Pulse Width Low to High
0.39
0.39
0.39
ns
tWASYN
Asynchronous Pulse Width
0.37
0.37
0.37
ns
tREASYN
Asynchronous Recovery Time
0.13
0.15
0.17
ns
tHASYN
Asynchronous Removal Time
0.00
0.00
0.00
ns
tCLR
Asynchronous Clear-to-Q
0.23
0.27
0.31
ns
tPRESET
Asynchronous Preset-to-Q
0.23
0.27
0.31
ns
Table 2-22 • 3.3 V LVTTL I/O Module
Worst-Case Commercial Conditions VCCA = 1.425 V, VCCI = 3.0 V, TJ = 70°C (continued)
–2 Speed
–1 Speed
Std Speed
Parameter
Description
Min.
Max.
Min.
Max.
Min.
Max. Units



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