AS3911 datasheet(40/149 Pages) AMSCO

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AS3911 – 40

ams Datasheet, Confidential: 2013-Oct [2-03]

A p pl i c at io n I n f o r m at i o n

Figure 23:

SPI Communication: Writing of Single Byte

Figure 24:

SPI Communication: Writing of Multiple Bytes

Reading of Data from Addressable Registers (Read

Mode)

After the SPI operation mode bits the address of register to be

read has to be provided from the MSB to the LSB. Then one or

more data bytes are transferred to MISO output, always from

the MSB to the LSB. As in case of the write mode also the read

mode supports auto-incrementing address.

MOSI is sampled at the falling edge of SCLK (like shown in the

following diagrams), data to be read from the AS3911 internal

sampled by the master at the falling edge of SCLK.

In case the register on defined address does not exist all 0 data

is sent to MISO.

Figure 25 provides an example for reading of single byte.

SCLK rising

edge Data is

transfered

from µC

SCLK falling

edge Data is

sampled

Data is moved to

Address

A5-A0

/SS rising edge

signals end of

WRITE Mode

Two leading

bits indicate

Mode

/SS

SCLK

MOSI

Data is moved to

Address

<A5-A0> + n

/SS rising edge

signals end of

WRITE Mode

Two leading

bits indicate

Mode

Data is moved to

Address

<A5-A0> + (n-1)

Data is moved to

Address

<A5-A0> + 1

Data is moved

to Address

<A5-A0>

/SS

SCLK

MOSI

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