Electrical specifications

HVLED807PF

12/36

Doc ID 023464 Rev 5

Figure 5.

OFF-state drain and source current test circuit

Note:

The measured IDSS is the sum between the current across the startup resistor and the

Upper COMP voltage

2.7

V

Lower COMP voltage

0.7

V

Burst-mode threshold

1

V

Hys

Burst-mode hysteresis

65

mV

Current reference

Maximum value

1.5

1.6

1.7

V

Current reference voltage

0.192

0.2

0.208

V

Current sense

Leading-edge blanking

(5)

330

ns

Delay-to-output (H-L)

90

200

ns

Max. clamp value

0.7

0.75

0.8

V

Hiccup-mode OCP level

(4)

0.92

1

1.08

V

1.

2.

Limits are production tested at Tj=Ta=25 °C, and are guaranteed by statistical characterization in the range

Tj -25 to +125 °C.

3.

Not production tested, guaranteed statistical characterization only.

4.

Parameters tracking each other (in the same section).

5.

Guaranteed by design.

Table 5.

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

2.5V

COMP

SOURCE

DRAIN

VDD

+

-

CURRENT

CONTROL

ILED

GND

DMG

CS

Vin

750V

A

Idss

14V

AM13211v1