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L9822EPD データシート(PDF) 7 Page - STMicroelectronics |
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L9822EPD データシート(HTML) 7 Page - STMicroelectronics |
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7 / 17 page ![]() L9822E Pin description 7/17 2.1 Pin description Table 2. Pin function PowerSO20 pin # Multiwatt15 pin # Name Function 1, 10, 11, 20 8 GND Device ground. This ground applies for the logic circuits as well as the power output stages. 29 SO Serial output. This pin is the serial output from the shift register and it is tri-stated when CE is high. A high for a data bit on this pin indicates that the particular output is high. A low on this pin for a data bit indicates that the output is low. Comparing the serial output bits with the previous serial input bits the external microcontroller implements the diagnostic data supplied by the L9822E. 310 VCC Logic supply voltage - nominally 5V. 4 11 RESET Asynchronous reset for the output stages, the parallel latch and the shift register inside the L9822E. This pin is active low and it must not be left floating. A power on clear function may be implemented connecting this pin to VCC with an external resistor and to ground with an external capacitor. 5-8, 13-16 1-4, 12-15 OUTPUT 1-7 Power output pins. The input and output bits corresponding to 07 are sent and received first via the SPI bus and 00 is the last. The outputs are provided with current limiting and voltage sense functions for fault indication and protection. The nominal load current for these outputs is 500mA, but the current limiting is set to a minimum of 1.05A. The outputs also have on board clamps set at about 36V for recirculation of inductive load current. 9,12 - N.C. Pins not connected. 17 5 CE Chip enable. Data is transferred from the shift registers to the outputs on the rising edge of this signal. The falling edge of this signal sets the shift register with the output voltage sense bits coming from the output stages. The output driver for the SO pin is enabled when this pin is low. 18 6 SCLK Serial clock. This pin clocks the shift register. New SO data will appear on every rising edge of this pin and new SI data will be latched on every SCLK’s falling edge into the shift register. 19 7 SI Serial input. This pin is the serial data input. A high on this pin will program a particular output to be OFF, while a low will turn it ON. |
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