7

PI6C3622-1

Low Power Spread Spectrum Frequency Multiplier

SSCG-GP Family

PS8944A

01/30/08

Application Information

Decoupling Capacitor

Two decoupling capacitors of 0.1uF and 1nF must be connected in parallel between VDD and GND. To opti-

mize device performance and to lower output noise, the coupling capacitors should be placed on the compo-

nent side of the board as close to these pins as possible. There should be no vias placed between the decou-

pling capacitors and VDD pin. The PCB trace to VDD pin should be as short as possible, and no vias should

be placed between VDD and the capacitors in the decoupling circuit.

VDD

Strapping to high

S0,S1,

SSON

VDD

0.1uF 1nF

VDD

Strapping to low

S0,S1,

SSON

0.1uF 1nF

Crystal Load Capacitor

If a crystal is used with the device, two external trim capacitors, CLtrim, are used to adjust the effective capac-

itance to match the required crystal load capacitance. The CLtrim value can be derived from formula CLtrim =

2*CL – (Cs + Ci). The typical CLtrim = 28pF when crystal load = 18pF, stray capacitance Cs = 3pF and XTAL

pins capacitance = 5pF.

X1

Crystal

C

Ltrim

C

Ltrim

X2