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HV9961NG-G データシート(PDF) 6 Page - Supertex, Inc |
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HV9961NG-G データシート(HTML) 6 Page - Supertex, Inc |
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6 / 9 page ![]() 6 HV9961 Supertex inc. www.supertex.com The short circuit protection comparator trips when the volt- age at CS exceeds 0.44V. When this occurs, the GATE off- time T HICCUP = 400µs is generated to prevent stair-casing of the inductor current and potentially its saturation due to insufficient output voltage. The typical short-circuit current is shown in the waveform of Fig. 2. Fig.2. Short-circuit inductor current. A leading-edge blanking delay is provided at CS to prevent false triggering of the current feedback and the short circuit protection. Linear Dimming When the voltage at LD falls below 1.5V, the internal 275mV reference to the constant-current feedback becomes over- ridden by V LD • 0.185. As long as the current in the inductor remains continuous, the LED current is given by the equa- tion (3) above. However, when V LD falls below 150mV, the GATE output becomes disabled. The GATE signal recovers, when V LD exceeds 200mV. This is required in some applica- tions to be able to shut the LED lamp off with the same signal input that controls the brightness. The typical linear dimming response is shown in Fig.3. Fig.3. Typical linear dimming response of an HV9961 LED driver The linear dimming input could also be used for “mixed- mode” dimming to expand the dimming ratio. In such case a pulse-width modulated signal of a measured amplitude be- low 1.5V should be applied at LD. Input Voltage Regulator The HV9961 can be powered directly from an 8.0 ~ 450VDC supply through its VIN input. When this voltage is applied at the VIN pin, the HV9961 maintains a constant 7.5V level at VDD. This voltage can be used to power the IC and external circuitry connected to VDD within the rated maximum cur- rent or within the thermal ratings of the package, whichever limit is lower. The VDD pin must be bypassed by a low ESR capacitor to provide a low impedance path for the high fre- quency current of the GATE output. The HV9961 can also be powered through the VDD pin directly with a voltage greater than the internally regulated 7.5V, but less than 12V. Despite the instantaneous voltage rating of 450V, continu- ous voltage at VIN is limited by the power dissipation in the package. For example, when HV9961 draws I IN = 2.0mA from the VIN input, and the 8-pin SOIC package is used, the maximum continuous voltage at VIN is limited to: V IN(MAX) = (T J(MAX) - TA ) = 390V (5) R θ,J-A • IIN where the ambient temperature T A = 25 O C, the maximum working junction temperature T J(MAX) = 125 O C, the junction- to-ambient thermal resistance R θ,JA = 128 O C/W. In such cases, when it is needed to operate the HV9961 from a higher voltage, a resistor or a Zener diode can be added in series with the VIN input to divert some of the power loss from the HV9961. In the above example, using a 100V Zener diode will allow the circuit to work up to 490V. The input current drawn from the VIN pin is represented by the following equation: I IN ≈ 1.0mA + QG • fS (6) In the above equation, f S is the switching frequency, and QG is the GATE charge of the external FET obtained from the manufacturer’s datasheet. GATE Output The GATE output of the HV9961 is used to drive an external MOSFET. It is recommended that the gate charge Q G of the external MOSFET be less than 25nC for switching frequen- cies ≤100kHz and less than 15nC for switching frequencies >100kHz. 400µs 0.44V/R CS 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 LD (V) LD Response Characteristics |
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