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RM0312 データシート(PDF) 49 Page - STMicroelectronics

部品番号 RM0312
部品情報  STM8TL5xxx microcontroller family
PDF  275 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

RM0312 データシート(HTML) 49 Page - STMicroelectronics

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RM0312
Interrupt controller (ITC)
55
5.9
ITC and EXTI registers
5.9.1
CPU condition code register interrupt bits (CCR)
Address: refer to the general hardware register map table in the datasheet.
Reset value: 0x28
7
654
3210
V–
I1
H
I0
N
Z
C
rr
rw
r
rw
r
r
r
Bits 5, 3(1) I[1:0]: Software interrupt priority bits(2)
These two bits indicate the software priority of the current interrupt request. When an interrupt
request occurs, the software priority of the corresponding vector is loaded automatically from the
software priority registers (ITC_SPRx).
The I[1:0] bits can be also set/cleared by software using the RIM, SIM, HALT, WFI, IRET or
PUSH/POP instructions (see Figure 9: Nested interrupt management).
I1
I0
Priority
Level
1
0
Level 0 (main)
Low
High
0
1
Level 1
0
0
Level 2
1
1
Level 3 (= software priority disabled*)
1. Refer to the central processing section for details on the other CCR bits.
2. TRAP and RESET events can interrupt a level-3 program.



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