PYA28HC256 - HIGH SPEED 32K x 8 EEPROM

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Document # EEPROM106 REV 03

APPLICATIOn nOTE - SOFTWARE CHIP ERASE

CHIP ERASE CYCLE CHARACTERISTICS

notes:

Data Format: (Hex); Address Format: (Hex).

1.

After loading the 6-byte code, no byte loads are

2.

allowed until the completion of the erase cycle.

The erase cycle will time itself to completion

in 20 ms (max).

the flow diagram shown is for a x8 part. For a

3.

x16 part, the data should be 16 bits long (e.g.,

the data to be loaded should be AAAA for step

1 in the algorithm).

The entire device can be erased at one time by using a 6-byte software code. The software chip erase code consists of

6-byte load commands to specific address locations with specific data patterns. Once the code has been entered, the

device will set each byte to the high state (FFH). After the software chip erase has been initiated, the device will inter-

nally time the erase operation so that no external clocks are required. The maximum time required to erase the whole

chip is t

Symbol

Parameter

t

EC

Chip Erase Cycle Time

20 ms Max

notes:

OE

1.

must be high only when WE and CE are both low.

CHIP ERASE CYCLE WAVEFORMS