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TAS5731MPHPR データシート(PDF) 29 Page - Texas Instruments

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部品番号 TAS5731MPHPR
部品情報  Digital Audio Power Amplifier
PDF  81 Pages
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メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI1 - Texas Instruments

TAS5731MPHPR データシート(HTML) 29 Page - Texas Instruments

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background image
23
22
SCLK
32Clks
LRCLK
LeftChannel
24-BitMode
1
19
18
20-BitMode
16-BitMode
15
14
MSB
LSB
32Clks
RightChannel
2-ChannelLeft-JustifiedStereoInput
T0034-02
4
5
9
8
1
4
5
1
0
0
0
23
22
1
19
18
15
14
MSB
LSB
4
5
9
8
1
4
5
1
0
0
0
SCLK
TAS5731M
www.ti.com
SLOS838C – JULY 2013 – REVISED AUGUST 2015
Feature Description (continued)
9.3.10.2 Left-Justified
Left-justified (LJ) timing uses LRCLK to define when the data being transmitted is for the left channel and when it
is for the right channel. LRCLK is high for the left channel and low for the right channel. A bit clock running at 32,
48, or 64 × fS is used to clock in the data. The first bit of data appears on the data lines at the same time LRCLK
toggles. The data is written MSB-first and is valid on the rising edge of the bit clock. The DAP masks unused
trailing data bit positions.
NOTE: All data presented in 2s-complement form with MSB first.
Figure 49. Left-Justified 64-FS Format
Copyright © 2013–2015, Texas Instruments Incorporated
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Product Folder Links: TAS5731M



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