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STCOM05 データシート(PDF) 29 Page - STMicroelectronics

部品番号 STCOM05
部品情報  Powerline communication and application system-on-chip
PDF  58 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STCOM05 データシート(HTML) 29 Page - STMicroelectronics

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STCOM
Description
58
4.
Level 4: secure for customer loader
The JTAG is blocked and it is not possible to access the embedded Flash for the
external read or write operation via the JTAG, while the read and write access is
allowed to the CortexTM-M4 code (with the exception of the shadow sector). With
respect to the Level 2, there is no load or upgrade of the firmware image from the
external NVM. The firmware image shall be already present in the embedded Flash
(loaded in Level 1) and a customer application (secondary bootloader) can manage
upgrades.
5.
Level 1*: secure erase and unlocking
The Cortex™-M4 is accessible through the JTAG and it's possible to download
firmware in the embedded Flash. Before the unlocking, the embedded Flash is fully
erased including the customer OTP data. The shadow sector is not accessible.
In order to respect these security requirements, the STCOM embeds a bootloader code.
The user can also configure the boot mode through the BOOT0/1 pins to select the proper
mode. The following boot modes are available:
1.
Normal mode: this is the standard way of booting the code and eventually load (or
restore) a new image version from the external NVM.
2.
Customer OTP write mode: in this mode the user can write its security keys and data
(e.g.: custom EUI48). After booting in this mode the security level is 2 (secure) or 4
(secure for customer loader) based on the selected option. In the security level 2 only
ciphered firmware can be loaded from an external memory while in the security level 4
the firmware upgrade is left to a customer bootloader.
3.
Unlocking mode: this is the boot mode that enables again all the debug feature.
4.
Low power mode: the minimal boot mode to guarantee low power operations. The
RTE is not enabled and the CortexTM-M4 code is executed as soon as possible at 24
MHz (the user can then scale the clock up or down).
The relationship between the security level and boot mode are shown in Table 5:
Table 5. Boot mode and security level relationship
Boot
mode
Level 1
Level 2
Level 3
Level 4
Level 1*
Normal
mode
Yes
Yes
If lock option
selected for some
area → go to level 3
Yes, but no update
is performed on
locked sector
Yes
(no update is
performed)
Yes
Customer
OTP write
mode
Yes → go to level
2 or 4
No
No
No
No
Unlocking
mode
Yes → go to level
1*
Yes → go to level
1*
Yes → go to level
1*
Yes → go to level
1*
Yes → go to level
1*
Low power
mode
Yes
Yes
Yes
Yes
Yes



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