データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

LNBH26LS データシート(PDF) 22 Page - STMicroelectronics

部品番号 LNBH26LS
部品情報  Dual LNBS supply and control IC with step-up and IC interface
PDF  33 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LNBH26LS データシート(HTML) 22 Page - STMicroelectronics

Back Button LNBH26LS Datasheet HTML 18Page - STMicroelectronics LNBH26LS Datasheet HTML 19Page - STMicroelectronics LNBH26LS Datasheet HTML 20Page - STMicroelectronics LNBH26LS Datasheet HTML 21Page - STMicroelectronics LNBH26LS Datasheet HTML 22Page - STMicroelectronics LNBH26LS Datasheet HTML 23Page - STMicroelectronics LNBH26LS Datasheet HTML 24Page - STMicroelectronics LNBH26LS Datasheet HTML 25Page - STMicroelectronics LNBH26LS Datasheet HTML 26Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 22 / 33 page
background image
I²C interface protocol
LNBH26LS
22/33
DocID025504 Rev 1
Bit
Name
CH
Value
Description
0
DSQIN input pin is set to receive external DiSEqC envelope
TTL signal
Bit 7
(MSb)
N/A
0
Reserved. Keep to “0”.
N/A = reserved bit.
All bits reset to “0” at power-on.
Table 8: DATA 3 (read/write register. Register address = 0X4)
Bit
Name
CH
Value
Description
Bit 0 (LSb)
N/A
A
0
Reserved. Keep to “0”
Bit 1
N/A
0
Reserved. Keep to “0”
Bit 2
PCL-A
1
Pulsed (dynamic) LNB output current limiting is deactivated
0
Pulsed (dynamic) LNB output current limiting is activated
Bit 3
N/A
0
Reserved. Keep to “0”
Bit 4
N/A
0
Reserved. Keep to “0”
Bit 5
N/A
0
Reserved. Keep to “0”
Bit 6
PCL-B
B
1
Pulsed (dynamic) LNB output current limiting is deactivated
0
Pulsed (dynamic) LNB output current limiting is deactivated
Bit 7 (MSb)
N/A
0
Reserved. Keep to “0”
N/A = reserved bit.
All bits reset to “0” at power-on.
Table 9: DATA 4 (read/write register. Register address = 0X5)
Bit
Name
CH
Value
Description
Bit 0
(LSb)
N/A
-
0
Reserved. Keep to 0
Bit 1
N/A
-
0
Reserved. Keep to 0
Bit 2
N/A
-
0
Reserved. Keep to 0
Bit 3
OLR
A/B
1
In case of overload protection activation (OLF=1), all VSEL 1..4
bits are reset to “0” and LNB output (VOUT pin) is disabled. The
VSEL bits must be set again by the master after the overcurrent
condition is removed (OLF=0).
0
In case of overload protection activation (OLF=1) the LNB output
(VOUT pin) is automatically enabled as soon as the overload
condition is removed (OLF=0) with the previous VSEL bits
setting.
Bit 4
N/A
-
0
Reserved. Keep to 0
Bit 5
N/A
-
0
Reserved. Keep to 0
Bit 6
THERM
A/B
1
If thermal protection is activated (OTF=1), all VSEL 1..4 bits are
reset to “0” and LNB output (VOUT pin) is disabled. The VSEL bits
must be set again by the master after the overtemperature
condition is removed (OTF=0).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com