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C161PI データシート(PDF) 10 Page - Infineon Technologies AG

部品番号 C161PI
部品情報  16-Bit Single-Chip Microcontroller
PDF  82 Pages
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メーカー  INFINEON [Infineon Technologies AG]
ホームページ  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

C161PI データシート(HTML) 10 Page - Infineon Technologies AG

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&3,
Data Sheet
8
1999-07
P4
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
24
25
26
27
28
29
30
26
27
28
29
30
31
32
IO
O
O
O
O
O
O
O
Port 4 is a 7-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits. For
a pin configured as input, the output driver is put into
high-impedance state. Port 4 outputs can be
configured as push/pull or open drain drivers. The input
threshold of Port 4 is selectable (TTL or special). Port 4
can be used to output the segment address lines:
A16
Least Significant Segment Address Line
A17
Segment Address Line
A18
Segment Address Line
A19
Segment Address Line
A20
Segment Address Line
A21
Segment Address Line
A22
Most Significant Segment Address Line
RD
31
33
O
External Memory Read Strobe. RD is activated for
every external instruction or data read access.
WR/
WRL
32
34
O
External Memory Write Strobe. In WR-mode this pin is
activated for every external data write access. In WRL-
mode this pin is activated for low byte data write
accesses on a 16-bit bus, and for every data write
access on an 8-bit bus. See WRCFG in register
SYSCON for mode selection.
READY 33
35
I
Ready Input. When the Ready function is enabled, a
high level at this pin during an external memory access
will force the insertion of memory cycle time waitstates
until the pin returns to a low level.
An internal pullup device will hold this pin high when
nothing is driving it.
ALE
34
36
O
Address Latch Enable Output. Can be used for latching
the address into external memory or an address latch
in the multiplexed bus modes.
Table 1
Pin Definitions and Functions (continued)
Symbol Pin
Num.
TQFP
Pin
Num.
MQFP
Input
Outp.
Function



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