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STM32F401CD データシート(PDF) 44 Page - STMicroelectronics

部品番号 STM32F401CD
部品情報  Up to 12 communication interfaces
PDF  135 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F401CD データシート(HTML) 44 Page - STMicroelectronics

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Pinouts and pin description
STM32F401xD STM32F401xE
44/135
DocID025644 Rev 3
47 A6 63
99
-
VSS
S
-
-
-
-
-
B6
-
-
H3
PDR_ON
I
FT
-
-
-
48 A7 64 100
-
VDD
S
-
-
-
-
1. Function availability depends on the chosen device.
2. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3
mA), the use of GPIOs PC13 to PC15 in output mode is limited:
- The speed should not exceed 2 MHz with a maximum load of 30 pF.
- These I/Os must not be used as a current source (e.g. to drive an LED).
3. Main function after the first backup domain power-up. Later on, it depends on the contents of the RTC registers even after
reset (because these registers are not reset by the main reset). For details on how to manage these I/Os, refer to the RTC
register description sections in the STM32F401xx reference manual.
4. FT = 5 V tolerant except when in analog mode or oscillator mode (for PC14, PC15, PH0 and PH1).
5. If the device is delivered in an UFBGA100 and the BYPASS_REG pin is set to VDD (Regulator off/internal reset ON mode),
then PA0 is used as an internal Reset (active low)
Table 8. STM32F401xD/xE pin definitions (continued)
Pin Number
Pin name
(function
after reset)(1)
Alternate functions
Additional
functions



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