CD54HC190, CD74HC190

CD54HC191, CD74HC191, CD54HCT191, CD74HCT191

SYNCHRONOUS UP/DOWN COUNTERS WITH DOWN/UP MODE CONTROL

SCHS275E − MARCH 2002 − REVISED OCTOBER 2003

18

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION − ’HCT191

Test

Point

From Output

Under Test

CL

(see Note A)

VCC

S1

S2

LOAD CIRCUIT

PARAMETER

tPZH

tpd or tt

tdis

ten

tPZL

tPHZ

tPLZ

Open

Closed

S1

Closed

Open

S2

Open

Closed

Closed

Open

Open

Open

NOTES: A. CL includes probe and test-fixture capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following

characteristics: PRR

≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.

D. For clock inputs, fmax is measured with the input duty cycle at 50%.

E. The outputs are measured one at a time with one input transition per measurement.

F. tPLZ and tPHZ are the same as tdis.

G. tPZL and tPZH are the same as ten.

H. tPLH and tPHL are the same as tpd.

RL = 1 kΩ

VOLTAGE WAVEFORMS

SETUP AND HOLD AND INPUT RISE AND FALL TIMES

th

tsu

50% VCC

50% VCC

50%

10%

10%

90%

90%

VCC

VCC

0 V

0 V

tr

tf

Reference

Input

Data

Input

VOLTAGE WAVEFORMS

PROPAGATION DELAY AND OUTPUT TRANSITION TIMES

50% VCC

50% VCC

50%

10%

10%

90%

90%

VCC

VOH

VOL

0 V

tr

tf

Input

In-Phase

Output

50% VCC

tPLH

tPHL

50% VCC

50%

10%

10%

90%

90%

VOH

VOL

tr

tf

tPHL

tPLH

Out-of-Phase

Output

0 V

tw

VOLTAGE WAVEFORMS

PULSE DURATION

Input

50% VCC

50% VCC

VCC

Output

Control

Output

Waveform 1

(see Note B)

Output

Waveform 2

(see Note B)

VOL

VOH

tPZL

tPZH

tPLZ

tPHZ

≈VCC

0 V

50% VCC

10%

50% VCC

≈0 V

VOLTAGE WAVEFORMS

OUTPUT ENABLE AND DISABLE TIMES

50% VCC

50% VCC

90%

VCC

VOLTAGE WAVEFORMS

RECOVERY TIME

50% VCC

VCC

0 V

LOAD

Input

CLK

50% VCC

VCC

trec

0 V

Figure 5. Load Circuit and Voltage Waveforms