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LXT381II データシート(PDF) 1 Page - Intel Corporation |
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LXT381II データシート(HTML) 1 Page - Intel Corporation |
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1 / 36 page  LXT381 Octal E1 Line Interface Unit Datasheet General Description The LXT381 is an octal short haul analog Line Interface Unit for ITU G.703 2.048 Mbit/sec. transmission systems. It incorporates eight independent receivers and eight independent transmitters in a single LQFP-144 or PBGA-160 package. The transmit output drivers provide low impedance, constant during marks and spaces and constant pulse amplitudes independent of supply voltage variations. The LXT381 may be configured for unbalanced 75 Ω or for balanced 120Ω systems without external component changes in the transmit section. The transmit return loss performance exceeds latest ETSI return loss recommendations such as ETS 300166. The LXT381 features a differential data receiver architecture with high noise interference margin. The receivers use peak detection and a variable threshold for reliable data recovery down to 500 mV or up to 12 dB of cable attenuation. Each receiver incorporates an analog Loss Of Signal (LOS) processor that meets latest ITU G.775 standard. The fast power down mode of all transmitters allows the implementation of Hitless Protection Switching (HPS) application without the use of relays. Applications s Synchronous Digital Hierarchy (SDH) E1 tributary interfaces s Public switching trunk line interfaces s Digital Access Cross Connects (DACS) s Microwave transmission systems Product Features s Octal E1 short haul line interface per ITU G.703 s Single rail supply voltage of 3.3V with 5V I/O capability s Low power consumption of <100 mW per channel (typ.) s 75 Ω/120Ω TX operation without component changes s Transmit return loss complies with ETSI ETS 300 166 s Hitless Protection Switching (HPS) s Driver short circuit current limiter (<50 mA RMS) s Differential receiver with 15dB of signal to noise interference margin s Data recovery with no need for external reference clock s Analog LOS detection per ITU G.775 s Simple hardware control mode s JTAG Boundary Scan test port per IEEE 1149.4 s Small footprint 144 pin LQFP or 160 pin PBGA package As of January 15, 2001, this document replaces the Level One document Order Number: 249005-001 known as Octal E1 Line Interface. January 2001 |
同様の部品番号 - LXT381II |
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同様の説明 - LXT381II |
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