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AP0100CS データシート(PDF) 40 Page - ON Semiconductor |
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AP0100CS データシート(HTML) 40 Page - ON Semiconductor |
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40 / 73 page  AP0100CS HDR: Image Signal Processor (ISP) Serial Memory Partition AP0100CS/D Rev. 6, Pub. 1/16 EN 40 ©Semiconductor Components Industries, LLC,2016. Serial Memory Partition The contents of the Flash/EEPROM memory partition logically into three blocks (see Figure 28): • Memory for overlay data and descriptors • Memory for register settings, which may be loaded at boot-up • Firmware extensions or software patches; in addition to the on-chip firmware, exten- sions reside in this block of memory These blocks are not necessarily contiguous. Figure 28: Memory Partitioning S/W Patch Alternate Reg. Setting Overlay Data Flash Partitioning Fixed Size Overlays-RLE 12Byte Header RLE Encoded Data 2kByte Fixed Size Overlays-RLE Lens Correction Parameter Fixed-size Overlays – RLE Fixed-size Overlays – RLE Flash Partitioning Overlay Data Software Patch 12-byte Header RLE Encoded Data 2KB Lens Shading Correction Parameter Alternate Register Setting 4Kb |
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