AP0101CS datasheet(34/42 Pages) ONSEMI

34 / 42 page

AP0101CS/D Rev. 7, 1/16 EN

©Semiconductor Components Industries, LLC,2016.

AP0101CS HDR: Image Signal Processor (ISP)

Host Command Interface

The AP0101CScan be configured by a serial EEPROM or Flash through the SPI Interface.

Figure 23:

Flash Mode

Figure 24:

Host Mode with Flash

In this configuration all settings are communicated to the AP0101CS and sensor through

the microcontroller.

Figure 25:

Host Mode

Supported NVM Devices

The AP0101AT supports a variety of SPI NVM devices. Refer to the Flash/EEPROM

programming section of the Developer Guide for details.

Host Command Interface

The AP0101CS has a mechanism to execute higher level commands, the Host Command

Interface (HCI). Once a command has been written through the HCI, it will be executed

by on-chip firmware and the results are reported back. EEPROM or Flash memory is also

available to store commands for later execution. For details on the host command inter-

face and host commands, refer to the Host Command Interface document.

Serial

EEPROM/Flash

SPI

AP0101CS

+ image sensor

AP0101CS

+ image sensor

SPI

8/16bit

μC

two-wire

System Bus

Serial

EEPROM/Flash

8/16bit

μC

two-wire

System Bus

AP0101CS

+ image sensor

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