ST7MC1 datasheet(263/308 Pages) STMICROELECTRONICS

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ST7MC1/ST7MC2

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12.8 I/O PORT PIN CHARACTERISTICS

12.8.1 General Characteristics

Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified.

Notes:

1. Data based on characterization results, not tested in production.

2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.

3. IINJ(PIN) must never be exceeded. This is implicitly insured if VIN maximum is respected. If VIN maximum cannot be

respected, the injection current must be limited externally to the IINJ(PIN) value. A positive injection is induced by VIN>VDD

while a negative injection is induced by VIN<VSS.

Refer to section 12.2.2 on page 247 for more details. For PD7, refer to ‘INJECTED CURRENT ON PD7” on page 302.

4. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for

example or an external pull-up or pull-down resistor (see Figure 138). Static peak current value taken at a fixed VIN value,

based on design simulation and technology characteristics, not tested in production. This value depends on VDD and tem-

perature values.

5. The RPU pull-up equivalent resistor is based on a resistive transistor (corresponding IPU current characteristics de-

scribed in Figure 139). This data is based on characterization results, tested in production at VDD max.

6. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external

interrupt source.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Input low level voltage

CMOS ports

0.3xVDD

VIH

Input high level voltage

0.7xVDD

Vhys

Schmitt trigger voltage hysteresis 2)

VIL

Input low level voltage

G & H ports

0.8

VIH

Input high level voltage

2.8

Vhys

Schmitt trigger voltage hysteresis 2)

400

IINJ(PIN)

Injected Current on an I/O

VDD=5V

+5/-2

ΣI

INJ(PIN)

3) Total injected current (sum of all I/O

and control pins)

± 25

Input leakage current

VSS≤VIN≤VDD

±1

µA

Static current consumption induced

by each floating input pin4)

Floating input mode

200

RPU

Weak pull-up equivalent resistor 5)

VIN=VSS

250

Ω

CIO

I/O pin capacitance

tf(IO)out

Output high to low level fall time 1)

CL=50pF

Between 10% and 90%

tr(IO)out

Output low to high level rise time 1)

tw(IT)in

External interrupt pulse time 6)

1tCPU

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