| データシートサーチシステム |
|
ST7MC1 データシート(PDF) 260 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST7MC1 データシート(HTML) 260 Page - STMicroelectronics |
|
260 / 308 page ![]() ST7MC1/ST7MC2 260/308 12.7 EMC CHARACTERISTICS Susceptibility tests are performed on a sample ba- sis during product characterization. 12.7.1 Functional EMS (Electro Magnetic Susceptibility) Based on a simple running application on the product (toggling 2 LEDs through I/O ports), the product is stressed by two electro magnetic events until a failure occurs (indicated by the LEDs). ■ ESD: Electro-Static Discharge (positive and negative) is applied on all pins of the device until a functional disturbance occurs. This test conforms with the IEC 1000-4-2 standard. ■ FTB: A Burst of Fast Transient voltage (positive and negative) is applied to VDD and VSS through a 100pF capacitor, until a functional disturbance occurs. This test conforms with the IEC 1000-4- 4 standard. A device reset allows normal operations to be re- sumed. The test results are given in the table be- low based on the EMS levels and classes defined in application note AN1709. 12.7.1.1 Designing hardened software to avoid noise problems EMC characterization and optimization are per- formed at component level with a typical applica- tion environment and simplified MCU software. It should be noted that good EMC performance is highly dependent on the user application and the software in particular. Therefore it is recommended that the user applies EMC software optimization and prequalification tests in relation with the EMC level requested for his application. Software recommendations: The software flowchart must include the manage- ment of runaway conditions such as: – Corrupted program counter – Unexpected reset – Critical Data corruption (control registers...) Prequalification trials: Most of the common failures (unexpected reset and program counter corruption) can be repro- duced by manually forcing a low state on the RE- SET pin or the Oscillator pins for 1 second. To complete these trials, ESD stress can be ap- plied directly on the device, over the range of specification values. When unexpected behaviour is detected, the software can be hardened to pre- vent unrecoverable errors occurring (see applica- tion note AN1015). Symbol Parameter Conditions Level/ Class VFESD Voltage limits to be applied on any I/O pin to induce a function- al disturbance Flash/ROM devices VDD=5V, TA=+25°C, fOSC=8MHz, LVD OFF conforms to IEC 1000-4-2 4A VDD=5V, TA=+25°C, fOSC=8MHz, LVD ON conforms to IEC 1000-4-2 2B VFFTB Fast transient voltage burst lim- its to be applied through 100pF on VDD and VDD pins to induce a functional disturbance Flash devices VDD=5V, TA=+25°C, fOSC=8MHz, conforms to IEC 1000-4-4 4A ROM devices VDD=5V, TA=+25°C, fOSC=8MHz, conforms to IEC 1000-4-4 3B |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |