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MPC8245 データシート(PDF) 4 Page - Freescale Semiconductor, Inc |
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MPC8245 データシート(HTML) 4 Page - Freescale Semiconductor, Inc |
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4 / 20 page ![]() MPC8245 Part Number Specification for the MPC8245ARZUnnnX Series, Rev. 2 4 Freescale Semiconductor General Parameters 4.1.5 Power Characteristics The AC electrical characteristics and AC timing for the parts described in this document are unaffected, and comply with the MPC8245 Integrated Processor Hardware Specifications. Table 5 provides the power consumption for the MPC8245 part numbers described herein. Table 5. Power Consumption Mode PCI Bus Clock/Memory Bus Clock CPU Clock Frequency (MHz) Unit Notes 66/133/399 66/133/466 Typical 2.8 3.2 W 1, 5 Max—CFP 3.3 3.6 W 1, 2 Max—INT 2.8 3.1 W 1, 3 Doze 1.9 2.1 W 1, 4, 6 Nap 0.7 0.8 W 1, 4, 6 Sleep 0.4 0.4 W 1, 4, 6 I/O Power Supplies10 Mode Range Range Unit Notes Typ—OVDD 140–360 140–360 mW 7, 8 Typ—GVDD 340–920 340–930 mW 7, 9 Notes: 1. The values include VDD, AVDD, and AVDD2, but do not include I/O supply power. 2. Maximum—FP power is measured at VDD = 2.1 V with dynamic power management enabled while running an entirely cache-resident, looping, floating point multiplication instruction. 3. Maximum—INT power is measured at VDD = 2.1 V with dynamic power management enabled while running entirely cache-resident, looping, integer instructions. 4. Power saving mode maximums are measured at VDD = 2.1 V while the device is in doze, nap, or sleep mode. 5. Typical power is measured at VDD = AVDD = 2.1 V, OVDD = 3.3 V where a nominal FP value, a nominal INT value, and a value where there is a continuous flush of cache lines with alternating ones and zeros on 64-bit boundaries to local memory are averaged. 6. Power saving mode data measured with only two PCI_CLKs and two SDRAM_CLKs enabled. 7. The typical minimum I/O power values was the result of the MPC8245 performing cache resident integer operations at the slowest frequency combination of 33:66:200 (PCI:Mem:CPU) MHz. 8. The typical maximum OVDD value resulted from the MPC8245 operating at the fastest frequency combination of 66:133:399 (PCI:Mem:CPU) MHz for the 400-MHz part, 66:133:466 (PCI:Mem:CPU) MHz for the 466-MHz part, and performing continuous flushes of cache lines with alternating ones and zeros to PCI memory. 9. The typical maximum GVDD value resulted from the MPC8245 operating at the fastest frequency combination of 66:133:399 (PCI:Mem:CPU) MHz for the 400-MHz part, 66:133:466 (PCI:Mem:CPU) MHz for the 466-MHz part, and performing continuous flushes of cache lines with alternating ones and zeros on 64-bit boundaries to local memory. 10. Power consumption of PLL supply pins (AVDD and AVDD2) < 15 mW that the design guarantees but were not tested. |
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